2024-10-24 08:22:12 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.90.20:5700'
2024-10-24 08:22:12 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.90.20:5802)
2024-10-24 08:22:12 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.90.20:5801)
2024-10-24 08:22:12 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.90.22:6700'
2024-10-24 08:22:12 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.90.22:6802)
2024-10-24 08:22:12 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.90.22:6801)
2024-10-24 08:22:12 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.90.20:5700/1'
2024-10-24 08:22:12 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.90.20:5804)
2024-10-24 08:22:12 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.90.20:5803)
2024-10-24 08:22:12 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.90.20:5700/2'
2024-10-24 08:22:12 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.90.20:5806)
2024-10-24 08:22:12 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.90.20:5805)
2024-10-24 08:22:12 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.90.20:5700/3'
2024-10-24 08:22:12 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.90.20:5808)
2024-10-24 08:22:12 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.90.20:5807)
2024-10-24 08:22:12 [INFO] fake_trx.py:423 Init complete
2024-10-24 08:22:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:22:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:22:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:22:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:22:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:22:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:22:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:22:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 0 -> 1
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:22:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:22:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 0 -> 1
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:22:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:22:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 0 -> 1
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:22:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:22:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 0 -> 1
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:22:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:22:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:22:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:22:17 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:17 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:22:17 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:22:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:22:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:22:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:18 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:22:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:22:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:22:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:22:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:22:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:22:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:22:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:22:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:22:19 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:22:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:20 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:22:20 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:22:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:22:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:22:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:22:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:22:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:21 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:22:21 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:22:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:22:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:21 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:22:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:22 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:22:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:22 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:23 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:22:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:22:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:22:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:23 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:22:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:24 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:22:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:22:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:22:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:24 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:22:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:25 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:22:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:22:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:22:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:25 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:22:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:22:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:22:26 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:22:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:26 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:22:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:27 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:22:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:27 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:22:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:22:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:28 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:22:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:22:28 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:22:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:22:28 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:22:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:22:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:22:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:22:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:22:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:22:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:22:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:22:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:22:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:22:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:22:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:22:29 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2753 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:22:29 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2753 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:22:29 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2753 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:22:29 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2753 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:22:29 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2753 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:22:29 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2753 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:22:29 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2753 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:22:29 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2753 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:22:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:22:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:22:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:22:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:22:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:22:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:22:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:22:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:22:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:22:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:22:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:22:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:22:35 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:22:35 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:22:35 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
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2024-10-24 08:22:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
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2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
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2024-10-24 08:22:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
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2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
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2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
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2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:22:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:22:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:22:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:22:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:22:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:22:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:22:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:22:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:22:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:22:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:22:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:22:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:22:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:22:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:22:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:22:42 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:22:42 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:22:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:42 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:22:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:22:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:22:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:22:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:22:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:22:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:22:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:22:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:22:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:22:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:22:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:22:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:22:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:22:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:22:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:22:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:22:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:22:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:22:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:22:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:22:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:22:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:22:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:22:47 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:22:47 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:47 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:22:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:22:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:22:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:22:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:22:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:22:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:22:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:22:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:22:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:22:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:22:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:22:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:22:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:22:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:22:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:22:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:22:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:22:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:22:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:22:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:22:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:22:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:22:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:22:53 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:53 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:22:53 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:22:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:22:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:22:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:22:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:22:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:22:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:22:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:22:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:22:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:22:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:22:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:22:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:22:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:22:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:22:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:22:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:22:59 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:22:59 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:22:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:59 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:22:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:22:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:22:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:22:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:22:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:22:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:22:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:22:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:22:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:22:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:22:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:22:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:22:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:22:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:23:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:23:00 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:23:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:23:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:23:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:23:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:23:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:23:01 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:23:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:23:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:23:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:23:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:23:02 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:23:02 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:23:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:23:03 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:23:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:23:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:23:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:23:03 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:23:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:23:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:23:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:23:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:23:04 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:23:04 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:23:05 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:23:05 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:23:05 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:23:06 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:23:06 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:23:07 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:23:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:07 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:23:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:23:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:23:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:23:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:08 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:23:08 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:23:09 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:23:09 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:23:10 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:23:10 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:23:11 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:23:11 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:23:12 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:23:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:23:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:23:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:23:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:12 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:23:12 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:23:13 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:23:13 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:23:14 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:23:14 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:23:15 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:23:15 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 08:23:16 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 08:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:23:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:23:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:16 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 08:23:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:17 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 08:23:17 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 08:23:18 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 08:23:18 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 08:23:19 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 08:23:19 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 08:23:20 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 08:23:20 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 08:23:20 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 08:23:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:23:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:23:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:21 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 08:23:21 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 08:23:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:22 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 08:23:22 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 08:23:23 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 08:23:23 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 08:23:24 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 08:23:24 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 08:23:25 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 08:23:25 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 08:23:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:23:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:23:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:23:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:26 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 08:23:26 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 08:23:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:27 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 08:23:27 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 08:23:27 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 08:23:28 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 08:23:28 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 08:23:29 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 08:23:29 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 08:23:30 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 08:23:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:23:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:23:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:23:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:23:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:30 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 08:23:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:31 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 08:23:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:31 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 08:23:32 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 08:23:32 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 08:23:33 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 08:23:33 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 08:23:34 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 08:23:34 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 08:23:35 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 08:23:35 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-24 08:23:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:23:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:23:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:23:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:35 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-24 08:23:36 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-24 08:23:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:36 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-24 08:23:37 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-24 08:23:37 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-24 08:23:38 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-24 08:23:38 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-24 08:23:39 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-24 08:23:39 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-24 08:23:40 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-24 08:23:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:23:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:23:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:23:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:23:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:40 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-24 08:23:41 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-24 08:23:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:41 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-24 08:23:42 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-24 08:23:42 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-24 08:23:43 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-24 08:23:43 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-24 08:23:43 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-24 08:23:44 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-24 08:23:44 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-24 08:23:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:23:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:23:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:45 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-24 08:23:45 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-24 08:23:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:46 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-24 08:23:46 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-24 08:23:47 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-24 08:23:47 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-24 08:23:48 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-24 08:23:48 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-24 08:23:49 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-24 08:23:49 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-24 08:23:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:23:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:23:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:23:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:50 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-24 08:23:50 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-24 08:23:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:50 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-24 08:23:51 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-24 08:23:51 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-24 08:23:52 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-24 08:23:52 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-24 08:23:53 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-24 08:23:53 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-24 08:23:54 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-24 08:23:54 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-24 08:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:23:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:55 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-24 08:23:55 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-24 08:23:56 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-24 08:23:56 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-24 08:23:57 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-24 08:23:57 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-24 08:23:58 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-24 08:23:58 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-24 08:23:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:23:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:23:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:23:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:23:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:23:58 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-24 08:23:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:23:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:23:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:23:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:23:59 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-24 08:23:59 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-24 08:24:00 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-24 08:24:00 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-24 08:24:01 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-24 08:24:01 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-24 08:24:02 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-24 08:24:02 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-24 08:24:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:03 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-24 08:24:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:03 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-24 08:24:04 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-24 08:24:04 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-24 08:24:05 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-24 08:24:05 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-24 08:24:06 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-24 08:24:06 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-24 08:24:06 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-24 08:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:07 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-24 08:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:07 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-24 08:24:08 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-24 08:24:08 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-24 08:24:09 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-24 08:24:09 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-24 08:24:10 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-24 08:24:10 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-24 08:24:11 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-24 08:24:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:11 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-24 08:24:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:12 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-24 08:24:12 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-24 08:24:13 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-24 08:24:13 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-24 08:24:13 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-24 08:24:14 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-24 08:24:14 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-24 08:24:15 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-24 08:24:15 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-24 08:24:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:16 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-24 08:24:16 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-24 08:24:17 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-24 08:24:17 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-24 08:24:18 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-24 08:24:18 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-24 08:24:19 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-24 08:24:19 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-24 08:24:20 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-24 08:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:20 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-24 08:24:21 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-24 08:24:21 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-24 08:24:21 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-24 08:24:22 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-24 08:24:22 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-24 08:24:23 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-24 08:24:23 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-24 08:24:24 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-24 08:24:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:24 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-24 08:24:25 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-24 08:24:25 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-24 08:24:26 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-24 08:24:26 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-24 08:24:27 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2024-10-24 08:24:27 [DEBUG] clck_gen.py:102 IND CLOCK 19278
2024-10-24 08:24:28 [DEBUG] clck_gen.py:102 IND CLOCK 19380
2024-10-24 08:24:28 [DEBUG] clck_gen.py:102 IND CLOCK 19482
2024-10-24 08:24:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:24:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:24:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:24:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:24:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:24:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:24:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:24:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:24:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:24:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:24:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=19535 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:24:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:24:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=19535 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:24:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=19535 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:24:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=19535 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:24:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=19535 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:24:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:24:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:24:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:24:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:24:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:24:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:24:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:24:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:24:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:24:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:24:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:24:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:24:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:24:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:24:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:24:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:24:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:24:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:24:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:24:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:24:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:24:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:24:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:24:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:24:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:24:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:24:39 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:24:39 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:24:39 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:24:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:24:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:24:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:24:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:24:42 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:43 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:24:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:43 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:24:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:24:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:24:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:24:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:24:44 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:44 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:44 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:45 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:45 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:46 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:46 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:47 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:47 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:48 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:24:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:24:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:24:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:24:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2140 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:24:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2140 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:24:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2140 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:24:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2140 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:24:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2140 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:24:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2140 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:24:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:24:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:24:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:24:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:24:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:24:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:24:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:24:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:24:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:24:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:24:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:24:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:24:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:24:54 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:24:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:54 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:24:54 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:24:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:24:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:24:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:24:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:24:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:24:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:24:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:24:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:24:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:24:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:24:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:24:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:24:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:56 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:24:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:24:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:24:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:24:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:24:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:57 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:24:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:24:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:24:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:24:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:57 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:58 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:24:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:24:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:24:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:24:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:58 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:24:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:59 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:24:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:24:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:24:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:24:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:24:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:24:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:24:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:24:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:24:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:24:59 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:25:00 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:25:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:00 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:25:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:01 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:25:01 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:25:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:02 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:25:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:02 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:25:03 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:25:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:03 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:25:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:25:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:04 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:25:04 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:25:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:04 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:05 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:25:05 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:25:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:06 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:25:06 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:25:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:25:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:07 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:25:07 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:25:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:08 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:25:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:08 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:25:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:09 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:25:09 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:25:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:10 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:25:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:10 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 08:25:11 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 08:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:11 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 08:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:12 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 08:25:12 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 08:25:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:12 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 08:25:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:13 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 08:25:13 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 08:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:14 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 08:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:14 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 08:25:15 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 08:25:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:15 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 08:25:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:16 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 08:25:16 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 08:25:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:17 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 08:25:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:17 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 08:25:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:18 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 08:25:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:18 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 08:25:19 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 08:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:19 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 08:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:20 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 08:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:20 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 08:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:20 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 08:25:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:21 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 08:25:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:21 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 08:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:22 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 08:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:25:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:25:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:25:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:25:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:25:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:25:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:25:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:25:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:25:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6322 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:25:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:25:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:25:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6322 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:25:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6322 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:25:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6322 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:25:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6322 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:25:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6322 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:25:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6322 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:25:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6322 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:25:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:25:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:25:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:25:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:25:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:25:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:25:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:25:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:25:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:25:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:25:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:25:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:25:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:25:28 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:25:28 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:25:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:28 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:25:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:25:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:25:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:25:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:25:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:25:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:25:29 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:25:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:25:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:25:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:25:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:25:30 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:25:30 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:25:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:25:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:25:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:25:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:25:31 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:25:31 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:25:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:25:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:25:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:25:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:25:32 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:25:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:32 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:25:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:25:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:25:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:25:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:25:33 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:25:33 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:25:33 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:25:34 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:25:34 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:25:35 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:25:35 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:25:36 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:36 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:25:37 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:25:37 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:25:38 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:25:38 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:25:39 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:25:39 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:25:40 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:25:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:40 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:25:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:40 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:25:41 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:25:41 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:25:42 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:25:42 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:25:43 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:25:43 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:25:44 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:25:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:44 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 08:25:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:45 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 08:25:45 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 08:25:46 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 08:25:46 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 08:25:47 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 08:25:47 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 08:25:48 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 08:25:48 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 08:25:48 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 08:25:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:49 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 08:25:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:49 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 08:25:50 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 08:25:50 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 08:25:51 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 08:25:51 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 08:25:52 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 08:25:52 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 08:25:53 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 08:25:53 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 08:25:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:54 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 08:25:54 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 08:25:55 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 08:25:55 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 08:25:56 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 08:25:56 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 08:25:56 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 08:25:57 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 08:25:57 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 08:25:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:25:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:25:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:25:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:25:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:25:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:25:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:25:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:25:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:25:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:25:58 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 08:25:58 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 08:25:59 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 08:25:59 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 08:26:00 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 08:26:00 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 08:26:01 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 08:26:01 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 08:26:02 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 08:26:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:26:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:26:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:26:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:02 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 08:26:03 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 08:26:03 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 08:26:03 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 08:26:04 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-24 08:26:04 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-24 08:26:05 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-24 08:26:05 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-24 08:26:06 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-24 08:26:06 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-24 08:26:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:26:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:26:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:26:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:26:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:07 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-24 08:26:07 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-24 08:26:08 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-24 08:26:08 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-24 08:26:09 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-24 08:26:09 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-24 08:26:10 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-24 08:26:10 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-24 08:26:11 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-24 08:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:26:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:26:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:11 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-24 08:26:11 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-24 08:26:12 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-24 08:26:12 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-24 08:26:13 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-24 08:26:13 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-24 08:26:14 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-24 08:26:14 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-24 08:26:15 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-24 08:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:26:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:26:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:15 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-24 08:26:16 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-24 08:26:16 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-24 08:26:17 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-24 08:26:17 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-24 08:26:18 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-24 08:26:18 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-24 08:26:19 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-24 08:26:19 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-24 08:26:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:26:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:26:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:26:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:19 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-24 08:26:20 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-24 08:26:20 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-24 08:26:21 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-24 08:26:21 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-24 08:26:22 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-24 08:26:22 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-24 08:26:23 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-24 08:26:23 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-24 08:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:26:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:26:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:24 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-24 08:26:24 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-24 08:26:25 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-24 08:26:25 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-24 08:26:26 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-24 08:26:26 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-24 08:26:26 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-24 08:26:27 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-24 08:26:27 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-24 08:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:26:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:26:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:28 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-24 08:26:28 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-24 08:26:29 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-24 08:26:29 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-24 08:26:30 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-24 08:26:30 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-24 08:26:31 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-24 08:26:31 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-24 08:26:32 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-24 08:26:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:26:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:26:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:26:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:32 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-24 08:26:33 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-24 08:26:33 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-24 08:26:34 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-24 08:26:34 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-24 08:26:34 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-24 08:26:35 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-24 08:26:35 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-24 08:26:36 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-24 08:26:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:26:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:26:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:26:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:36 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-24 08:26:37 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-24 08:26:37 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-24 08:26:38 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-24 08:26:38 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-24 08:26:39 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-24 08:26:39 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-24 08:26:40 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-24 08:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:26:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:26:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:40 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-24 08:26:41 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-24 08:26:41 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-24 08:26:41 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-24 08:26:42 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-24 08:26:42 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-24 08:26:43 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-24 08:26:43 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-24 08:26:44 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-24 08:26:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:26:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:26:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:26:44 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-24 08:26:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:45 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-24 08:26:45 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-24 08:26:46 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-24 08:26:46 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-24 08:26:47 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-24 08:26:47 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-24 08:26:48 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-24 08:26:48 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-24 08:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:26:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:26:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:26:49 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-24 08:26:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:26:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:26:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:49 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-24 08:26:49 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-24 08:26:50 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-24 08:26:50 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-24 08:26:51 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-24 08:26:51 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-24 08:26:52 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-24 08:26:52 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-24 08:26:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:26:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:26:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:26:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:26:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:26:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:26:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:26:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:26:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:26:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:26:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:26:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:26:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:26:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:26:53 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=18562 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:26:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:26:53 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=18562 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:26:53 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=18562 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:26:53 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=18562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:26:53 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=18562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:26:53 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=18562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:26:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:26:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:26:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:26:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:26:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:26:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:26:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:26:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:26:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:26:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:26:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:26:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:26:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:27:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:27:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:27:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:27:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:27:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:27:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:27:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:27:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:27:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:27:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:27:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:27:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:27:03 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:03 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:27:03 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:27:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:27:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:27:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:27:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:27:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:27:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:27:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:27:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:27:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:27:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:27:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:27:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:27:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:27:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:27:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:27:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:27:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:27:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:27:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:27:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:27:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:27:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:27:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:27:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:27:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:27:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:27:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:27:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:07 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:27:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:27:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:27:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:27:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:27:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:27:08 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:27:09 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:27:09 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:27:10 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:27:10 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:27:11 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:27:11 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:27:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:27:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:27:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:27:12 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:27:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:12 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:27:13 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:27:13 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:27:14 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:27:14 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:27:15 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:27:15 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:27:15 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:27:16 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:27:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:27:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:27:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:27:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:16 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:27:17 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:27:17 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:27:18 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:27:18 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:27:19 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:27:19 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:27:20 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 08:27:20 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 08:27:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:27:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:27:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:27:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:21 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 08:27:21 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 08:27:22 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 08:27:22 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 08:27:22 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 08:27:23 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 08:27:23 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 08:27:24 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 08:27:24 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 08:27:25 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 08:27:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:27:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:27:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:27:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:25 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 08:27:26 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 08:27:26 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 08:27:27 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 08:27:27 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 08:27:28 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 08:27:28 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 08:27:29 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 08:27:29 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 08:27:30 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 08:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:27:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:27:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:30 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 08:27:30 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 08:27:31 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 08:27:31 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 08:27:32 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 08:27:32 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 08:27:33 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 08:27:33 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 08:27:34 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 08:27:34 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 08:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:27:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:27:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:35 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 08:27:35 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 08:27:36 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 08:27:36 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 08:27:37 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 08:27:37 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 08:27:38 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 08:27:38 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 08:27:38 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 08:27:39 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 08:27:39 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-24 08:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:27:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:27:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:27:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:40 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-24 08:27:40 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-24 08:27:41 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-24 08:27:41 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-24 08:27:42 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-24 08:27:42 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-24 08:27:43 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-24 08:27:43 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-24 08:27:44 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-24 08:27:44 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-24 08:27:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:27:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:27:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:27:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:27:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:45 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-24 08:27:45 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-24 08:27:45 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-24 08:27:46 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-24 08:27:46 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-24 08:27:47 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-24 08:27:47 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-24 08:27:48 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-24 08:27:48 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-24 08:27:49 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-24 08:27:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:27:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:27:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:27:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:49 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-24 08:27:50 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-24 08:27:50 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-24 08:27:51 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-24 08:27:51 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-24 08:27:52 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-24 08:27:52 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-24 08:27:53 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-24 08:27:53 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-24 08:27:53 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-24 08:27:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:27:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:27:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:27:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:54 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-24 08:27:54 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-24 08:27:55 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-24 08:27:55 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-24 08:27:56 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-24 08:27:56 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-24 08:27:57 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-24 08:27:57 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-24 08:27:58 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-24 08:27:58 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-24 08:27:59 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-24 08:27:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:27:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:27:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:27:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:27:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:27:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:27:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:27:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:27:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:27:59 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-24 08:28:00 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-24 08:28:00 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-24 08:28:00 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-24 08:28:01 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-24 08:28:01 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-24 08:28:02 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-24 08:28:02 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-24 08:28:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:28:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:28:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:28:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:03 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-24 08:28:03 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-24 08:28:04 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-24 08:28:04 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-24 08:28:05 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-24 08:28:05 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-24 08:28:06 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-24 08:28:06 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-24 08:28:07 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-24 08:28:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:28:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:28:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:28:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:07 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-24 08:28:08 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-24 08:28:08 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-24 08:28:08 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-24 08:28:09 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-24 08:28:09 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-24 08:28:10 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-24 08:28:10 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-24 08:28:11 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-24 08:28:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:28:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:28:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:28:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:11 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-24 08:28:12 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-24 08:28:12 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-24 08:28:13 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-24 08:28:13 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-24 08:28:14 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-24 08:28:14 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-24 08:28:15 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-24 08:28:15 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-24 08:28:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:28:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:28:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:28:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:16 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-24 08:28:16 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-24 08:28:16 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-24 08:28:17 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-24 08:28:17 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-24 08:28:18 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-24 08:28:18 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-24 08:28:19 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-24 08:28:19 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-24 08:28:20 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-24 08:28:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:28:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:28:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:28:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:20 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-24 08:28:21 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-24 08:28:21 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-24 08:28:22 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-24 08:28:22 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-24 08:28:23 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-24 08:28:23 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-24 08:28:23 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-24 08:28:24 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-24 08:28:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:28:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:28:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:28:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:24 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-24 08:28:25 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-24 08:28:25 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-24 08:28:26 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-24 08:28:26 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-24 08:28:27 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-24 08:28:27 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-24 08:28:28 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-24 08:28:28 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-24 08:28:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:28:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:28:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:28:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:29 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-24 08:28:29 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-24 08:28:30 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-24 08:28:30 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-24 08:28:31 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-24 08:28:31 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2024-10-24 08:28:31 [DEBUG] clck_gen.py:102 IND CLOCK 19278
2024-10-24 08:28:32 [DEBUG] clck_gen.py:102 IND CLOCK 19380
2024-10-24 08:28:32 [DEBUG] clck_gen.py:102 IND CLOCK 19482
2024-10-24 08:28:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:28:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:28:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:28:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:28:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:28:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:28:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:28:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:28:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:28:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:28:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:28:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:28:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:28:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:28:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:28:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:28:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:28:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:28:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:28:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:28:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:28:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:28:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:28:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:28:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:28:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:28:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:28:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:28:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:28:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:28:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:28:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:28:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:28:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:28:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:28:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:28:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:28:43 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:28:43 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:28:43 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:28:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:28:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:28:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:28:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:28:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:28:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:28:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:28:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:28:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:28:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:28:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:28:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:28:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:28:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:28:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:28:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:28:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:28:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:28:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:28:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:28:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:28:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:28:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:28:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:28:46 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:28:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:28:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:28:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:28:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:28:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:28:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:28:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:28:47 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:28:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:47 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:28:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:28:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:28:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:28:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:28:48 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:48 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:28:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:28:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:28:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:49 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:28:49 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:28:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:28:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:28:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:28:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:50 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:28:50 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:28:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:28:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:28:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:28:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:51 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:28:51 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:28:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:28:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:28:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:28:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:28:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:52 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:28:52 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:28:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:28:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:28:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:28:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:52 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:28:53 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:28:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:28:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:28:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:28:53 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:28:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:28:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:54 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:28:54 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:28:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:28:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:28:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:28:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:55 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:28:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:55 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:28:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:28:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:28:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:28:56 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:28:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:56 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:28:57 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:28:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:28:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:28:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:28:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:57 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:28:58 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:28:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:28:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:28:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:28:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:58 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:28:59 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:28:59 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:28:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:28:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:28:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:28:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:28:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:28:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:28:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:28:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:28:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:28:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:00 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 08:29:00 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 08:29:00 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 08:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:29:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:29:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:01 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 08:29:01 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 08:29:02 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 08:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:29:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:29:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:02 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 08:29:03 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 08:29:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:29:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:29:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:29:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:03 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 08:29:04 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 08:29:04 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 08:29:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:29:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:29:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:29:05 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 08:29:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:05 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 08:29:06 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 08:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:29:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:29:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:29:06 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 08:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:07 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 08:29:07 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 08:29:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:29:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:29:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:29:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:29:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:29:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:29:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:29:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:29:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:29:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:29:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:29:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:29:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:29:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:29:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:29:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:29:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:29:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:29:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:29:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:29:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:29:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:29:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:29:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:29:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:29:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:29:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:29:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:29:13 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:29:13 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:13 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:29:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:29:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:29:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:29:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:29:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:29:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:29:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:29:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:29:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:29:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:29:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:29:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:29:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:29:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:29:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:29:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:29:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:29:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:29:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:29:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:29:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:29:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:29:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:29:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:29:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:29:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:29:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:29:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:29:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:29:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:29:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:29:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:29:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:29:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:29:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:29:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:29:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:29:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:29:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:29:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:29:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:29:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:29:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:29:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:29:21 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:29:22 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:29:22 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:29:23 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:29:23 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:29:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:24 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:29:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:29:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:29:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:29:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:29:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:24 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:29:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:25 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:29:25 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:29:26 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:29:26 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:29:27 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:29:27 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:29:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:28 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:29:28 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:29:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:29:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:29:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:29:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:29:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:28 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:29:29 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:29:29 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 08:29:30 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 08:29:30 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 08:29:31 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 08:29:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:31 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 08:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:29:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:29:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:29:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:32 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 08:29:32 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 08:29:33 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 08:29:33 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 08:29:34 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 08:29:34 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 08:29:35 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 08:29:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:29:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:29:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:29:35 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 08:29:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:29:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:36 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 08:29:36 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 08:29:36 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 08:29:37 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 08:29:37 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 08:29:38 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 08:29:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:38 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 08:29:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:29:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:29:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:29:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:29:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:39 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 08:29:39 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 08:29:40 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 08:29:40 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 08:29:41 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 08:29:41 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 08:29:42 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 08:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:29:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:29:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:29:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:29:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:29:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:29:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:29:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:29:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:29:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:29:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:29:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6412 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:29:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6412 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:29:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6412 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:29:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6412 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:29:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6412 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:29:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6412 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:29:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6412 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:29:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6412 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:29:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:29:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:29:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:29:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:29:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:29:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:29:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:29:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:29:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:29:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:29:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:29:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:29:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:29:48 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:29:48 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:29:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:48 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:29:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:29:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:29:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:29:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:29:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:29:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:29:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:29:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:29:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:29:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:29:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:29:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:29:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:29:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:29:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:29:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:29:50 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:29:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:29:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:29:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:29:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:29:50 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:29:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:51 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:29:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:29:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:29:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:29:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:29:51 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:29:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:29:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:29:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:29:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:29:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:52 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:29:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:29:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:29:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:29:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:29:52 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:29:53 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:29:53 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:29:54 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:29:54 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:29:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:55 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:29:55 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:29:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:29:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:29:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:56 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:29:56 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:29:56 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:29:57 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:29:57 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:29:58 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:29:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:58 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:29:59 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:29:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:29:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:29:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:29:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:29:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:29:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:29:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:29:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:29:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:29:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:29:59 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:29:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:00 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:30:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:30:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:30:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:30:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:30:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:30:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:30:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:00 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:30:01 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:30:01 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:30:02 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:30:02 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:30:03 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:30:03 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:03 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:30:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:30:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:30:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:30:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:30:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:30:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:30:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:04 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 08:30:04 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 08:30:05 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 08:30:05 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 08:30:06 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 08:30:06 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 08:30:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:07 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 08:30:07 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 08:30:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:30:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:30:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:30:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:30:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:30:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:30:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:08 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 08:30:08 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 08:30:09 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 08:30:09 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 08:30:10 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 08:30:10 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 08:30:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:11 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 08:30:11 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 08:30:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:30:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:30:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:30:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:30:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:30:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:30:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:11 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 08:30:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:12 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 08:30:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:30:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:30:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:30:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:30:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:30:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:30:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:30:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:30:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:12 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 08:30:13 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 08:30:13 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 08:30:14 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 08:30:14 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 08:30:15 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 08:30:15 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 08:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:30:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:30:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:30:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:30:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:30:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:30:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:16 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 08:30:16 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 08:30:17 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 08:30:17 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 08:30:18 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 08:30:18 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 08:30:18 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 08:30:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:30:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:30:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:30:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:30:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:30:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:30:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:19 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 08:30:19 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 08:30:20 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 08:30:20 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 08:30:21 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 08:30:21 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 08:30:22 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 08:30:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:30:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:30:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:30:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:30:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:30:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:30:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:22 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 08:30:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:23 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 08:30:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:30:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:30:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:30:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:30:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:30:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:30:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:30:23 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 08:30:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:30:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:24 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-24 08:30:24 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-24 08:30:25 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-24 08:30:25 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-24 08:30:26 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-24 08:30:26 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-24 08:30:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:26 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-24 08:30:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:30:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:30:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:30:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:30:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:30:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:30:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:27 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-24 08:30:27 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-24 08:30:28 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-24 08:30:28 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-24 08:30:29 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-24 08:30:29 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-24 08:30:30 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-24 08:30:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:30:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:30:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:30:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:30:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:30 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-24 08:30:31 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-24 08:30:31 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-24 08:30:32 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-24 08:30:32 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-24 08:30:33 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-24 08:30:33 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-24 08:30:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:30:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:30:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:30:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:30:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:30:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:30:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:33 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-24 08:30:34 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-24 08:30:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:30:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:30:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:30:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:30:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:30:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:30:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:30:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:30:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:30:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:30:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:30:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:30:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=10288 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:30:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:30:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=10288 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:30:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=10288 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:30:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=10288 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:30:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=10288 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:30:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=10288 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:30:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=10288 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:30:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=10288 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:30:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:30:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:30:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:30:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:30:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:30:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:30:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:30:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:30:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:30:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:30:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:30:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:30:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:30:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:30:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:30:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:30:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:30:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:30:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:30:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:30:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:30:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:30:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:30:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:30:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:30:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:30:45 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:30:45 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:30:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:45 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:30:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:30:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:30:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:30:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:30:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:30:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:30:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:30:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:30:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:30:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:30:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:30:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:30:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:30:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:30:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:30:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:30:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:30:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:30:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:30:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:30:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:30:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:30:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:30:49 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:30:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:30:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:30:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:30:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:30:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:30:50 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:30:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:30:51 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:30:51 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:30:51 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:30:52 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:30:52 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:30:53 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:30:53 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:30:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:30:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:30:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:30:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:30:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:30:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:30:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:30:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:30:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:30:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:30:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:30:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:30:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:30:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:30:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:30:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:30:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:30:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:30:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:30:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:30:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:30:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:30:59 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:30:59 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:30:59 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:30:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:30:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:30:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:31:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:31:01 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:31:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:31:02 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:31:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:02 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:31:02 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:31:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:03 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:31:03 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:31:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:04 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:31:04 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:31:05 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:31:05 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:31:06 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:31:06 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:31:07 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:31:07 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:31:08 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:31:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:31:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:31:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:31:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:31:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:31:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2012 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:31:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:31:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2012 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2012 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2012 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2012 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2012 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:31:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:31:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:31:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:31:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:31:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:31:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:31:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:31:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:31:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:31:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:31:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:31:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:31:14 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:31:14 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:31:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:14 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:31:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:31:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:31:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:31:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:31:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:31:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:31:17 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:31:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:31:18 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:31:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:31:19 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:31:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:31:20 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:31:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:31:21 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:31:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:31:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:31:22 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:31:22 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:31:23 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:31:23 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:31:24 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:31:24 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:31:25 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:31:25 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:31:26 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:31:26 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:31:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:31:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:31:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:31:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:31:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:31:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:31:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2897 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:31:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2897 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2897 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2897 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2897 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2897 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2897 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2897 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:31:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:31:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:31:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:31:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:31:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:31:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:31:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:31:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:31:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:31:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:31:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:31:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:31:32 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:31:32 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:31:32 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:31:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:33 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:31:33 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:31:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:31:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:33 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:31:34 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:31:34 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:31:34 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:31:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:35 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:31:35 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:31:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:36 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:31:36 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:31:36 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:31:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:37 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:31:37 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:31:37 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:31:37 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:31:37 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:31:38 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:31:38 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:31:38 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:31:39 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:31:39 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:31:40 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:31:40 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:31:40 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:31:41 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:31:41 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:31:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:31:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:31:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:31:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:31:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:31:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:31:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2219 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:31:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2219 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2219 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2219 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2219 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2219 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2219 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2219 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:31:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:31:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:31:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:31:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:31:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:31:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:31:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:31:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:31:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:31:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:31:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:31:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:31:47 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:47 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:31:47 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:48 [WARNING] transceiver.py:250 (MS@172.18.90.22:6700) RX TRXD message (fn=371 tn=1 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:49 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:50 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:31:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:31:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:31:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=760 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:31:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:31:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=760 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=760 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=760 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=760 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=760 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=760 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=760 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:31:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:31:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:31:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:31:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:31:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:31:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:31:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:31:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:31:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:31:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:31:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:31:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:31:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:31:56 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:31:56 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:31:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:56 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:31:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:31:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:31:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:31:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 08:31:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:31:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:31:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:31:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:31:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:31:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:31:57 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:31:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:58 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:31:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:31:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:31:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:31:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:31:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:31:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:31:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:31:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:31:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:31:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:31:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:31:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:31:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:32:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:32:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:32:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:32:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:32:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:32:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:32:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:32:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:32:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:32:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:32:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:32:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:32:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:32:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:32:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:32:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:32:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:32:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:32:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:32:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:32:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:32:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:32:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:32:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:32:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:32:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:32:08 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:32:08 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:32:08 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:32:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:32:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:32:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:32:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:32:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:32:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:32:09 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:32:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:32:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:32:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:32:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:32:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:32:10 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:32:11 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:32:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:32:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:32:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:32:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:32:11 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:32:12 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:32:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:32:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:32:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:32:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:32:12 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:32:13 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:32:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:32:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:32:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:32:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:32:13 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:32:14 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:32:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:32:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:32:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:32:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:32:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:32:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:32:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:32:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:32:14 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1306 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:32:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:32:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:32:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:32:14 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1306 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:32:14 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1306 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:32:14 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1306 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:32:14 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1306 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:32:14 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1306 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:32:14 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1306 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:32:14 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1306 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:32:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:32:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:32:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:32:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:32:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:32:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:32:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:32:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:32:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:32:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:32:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:32:19 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:32:19 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:32:19 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:32:19 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:32:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:32:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:32:20 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:32:21 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:32:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:32:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:32:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:32:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:32:21 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:32:22 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:32:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:32:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:32:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:32:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:32:22 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:32:23 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:32:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:32:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:32:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:32:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:32:23 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:32:24 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:32:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:32:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:32:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:32:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:32:24 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:32:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:32:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:32:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:32:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:32:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:32:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:32:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:32:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:32:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:32:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:32:24 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1206 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:32:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:32:24 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1206 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:32:24 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1206 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:32:24 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1206 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:32:24 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1206 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:32:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:32:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:32:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:32:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:32:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:32:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:32:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:32:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:32:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:32:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:32:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:32:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:32:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:32:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:32:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:32:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:32:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:32:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:32:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:32:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:32:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:32:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:32:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:32:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:32:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:32:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:32:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:32:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:32:35 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:32:35 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:32:35 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:32:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:32:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:32:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:32:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:32:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:32:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:32:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:32:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:32:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:32:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:32:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:32:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:32:36 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:32:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:32:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:32:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:32:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:32:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:32:37 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:32:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:32:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:32:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:32:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:32:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:32:38 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:32:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:32:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:32:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:32:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:32:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:32:39 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:32:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:32:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:32:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:32:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:32:40 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:32:40 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:32:41 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:32:41 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:32:42 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:32:42 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:32:43 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:32:43 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:32:43 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:32:44 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:32:44 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:32:45 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:32:45 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:32:46 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:32:46 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:32:47 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:32:47 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:32:48 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:32:48 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:32:49 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:32:49 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:32:50 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:32:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:32:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:32:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:32:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:32:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:32:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:32:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:32:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:32:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:32:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:32:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:32:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:32:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:32:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3313 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:32:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3313 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:32:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3313 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:32:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3313 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:32:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3313 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:32:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3313 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:32:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3313 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:32:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3313 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:32:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:32:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:32:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:32:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:32:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:32:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:32:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:32:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:32:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:32:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:32:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:32:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:32:55 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:32:55 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:32:55 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:32:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:32:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:32:55 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:32:55 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:32:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:32:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:32:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:32:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:32:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:32:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:32:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:32:57 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:32:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:32:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:32:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:32:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:32:57 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:32:58 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:32:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:32:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:32:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:32:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:32:58 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:32:59 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:32:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:32:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:32:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:32:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:32:59 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:33:00 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:33:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:33:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:33:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:33:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:33:00 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:33:00 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:33:02 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:33:02 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:33:03 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:33:03 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:33:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:33:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:33:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:33:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:33:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:33:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:33:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:33:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:33:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:33:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:33:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:33:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:33:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:33:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:33:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:33:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:33:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:33:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:33:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:33:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:33:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:33:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:33:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:33:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:33:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:33:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:33:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:33:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:33:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:33:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:33:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:33:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:33:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:33:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:33:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:33:09 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:33:09 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:33:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:33:09 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:33:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:33:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:33:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:33:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:33:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:33:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:33:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:33:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:33:09 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:33:09 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:33:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:33:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:33:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:33:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:33:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:33:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:33:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:33:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:33:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:33:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:33:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:33:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:33:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:33:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:33:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:33:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:33:11 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:33:11 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:33:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:33:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:33:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:33:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:33:12 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:33:12 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:33:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:33:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:33:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:33:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:33:13 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:33:13 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:33:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:33:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:33:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:33:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:33:14 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:33:14 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:33:15 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:33:15 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:33:15 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:33:16 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:33:16 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:33:17 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:33:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:33:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:33:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:33:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:33:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:33:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:33:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:33:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:33:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:33:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:33:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:33:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:33:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:33:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:33:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:33:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:33:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:33:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:33:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:33:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:33:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:33:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:33:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:33:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:33:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:33:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:33:23 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:33:23 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:33:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:33:23 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:33:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:33:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:33:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:33:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:33:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:33:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:33:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:33:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:33:23 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:33:23 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:33:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:33:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:33:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:33:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:33:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:33:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:33:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:33:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:33:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:33:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:33:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:33:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:33:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:33:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:33:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:33:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:33:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:33:25 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:33:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:33:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:33:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:33:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:33:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:33:26 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:33:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:33:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:33:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:33:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:33:26 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:33:27 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:33:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:33:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:33:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:33:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:33:27 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:33:28 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:33:28 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:33:29 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:33:29 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:33:30 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:33:30 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:33:31 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:33:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:33:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:33:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:33:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:33:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:33:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:33:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:33:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:33:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:33:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:33:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:33:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:33:31 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:33:31 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:33:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:33:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:33:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:33:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:33:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:33:31 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:33:31 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:33:32 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:33:32 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:33:33 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:33:33 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:33:34 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:33:34 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:33:35 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:33:35 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:33:36 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:33:36 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:33:37 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:33:37 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:33:38 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:33:38 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:33:38 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:33:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:33:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:33:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:33:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:33:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:33:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:33:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:33:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:33:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:33:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:33:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:33:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:33:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:33:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:33:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:33:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:33:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:33:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:33:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:33:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:33:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:33:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:33:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:33:44 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:33:44 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:33:44 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:33:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:33:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:33:44 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:33:44 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:33:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:33:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:33:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:33:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:33:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:33:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:33:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:33:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:33:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:33:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:33:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:33:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:33:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:33:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:33:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:33:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:33:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:33:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:33:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:33:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:33:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:33:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:33:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:33:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:33:48 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:33:48 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:33:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:33:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:33:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:33:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:33:49 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:33:49 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:33:50 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:33:50 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:33:51 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:33:51 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:33:52 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:33:52 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:33:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:33:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:33:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:33:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:33:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:33:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:33:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:33:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:33:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:33:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:33:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:33:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:33:52 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:33:52 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:33:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:33:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:33:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:33:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:33:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:33:53 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:33:53 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:33:54 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:33:54 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:33:55 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:33:55 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:33:55 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:33:56 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:33:56 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:33:57 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:33:57 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:33:58 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:33:58 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:33:59 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:33:59 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:34:00 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:34:00 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:34:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:34:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:34:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:34:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:34:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:34:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:34:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:34:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:34:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:34:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:34:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:34:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:34:00 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3620 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:34:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:34:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:34:00 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3620 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:34:00 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3620 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:34:00 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3620 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:34:00 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3620 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:34:00 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3620 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:34:00 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3620 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:34:00 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3620 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:34:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:34:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:34:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:34:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:34:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:34:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:34:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:34:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:34:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:34:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:34:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:34:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:34:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:34:06 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:34:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:34:06 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:34:06 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:34:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:34:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:34:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:34:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:34:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:34:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:34:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:34:06 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:34:06 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:34:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:34:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:34:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:34:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:34:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:34:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:34:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:34:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:34:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:34:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:34:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:34:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:34:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:34:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:34:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:34:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:34:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:34:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:34:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:34:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:34:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:34:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:34:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:34:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:34:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:34:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:34:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:34:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:34:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:34:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:34:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:34:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:34:11 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:34:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:34:12 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:34:12 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:34:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:34:13 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:34:13 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:34:14 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:34:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:34:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:34:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:34:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:34:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:34:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:34:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:34:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:34:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:34:14 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:34:14 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:34:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:34:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:34:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:14 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:34:15 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:34:15 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:34:16 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:34:16 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:34:17 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:34:17 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:34:18 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:34:18 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:34:19 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:34:19 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:34:20 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:34:20 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:34:20 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:34:21 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:34:21 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:34:22 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:34:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:34:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:34:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:34:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:34:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:34:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:34:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:34:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:34:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:34:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:34:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:34:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:34:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3620 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:34:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:34:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:34:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3620 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:34:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3620 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:34:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3620 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:34:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3620 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:34:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3620 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:34:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3620 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:34:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3620 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:34:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:34:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:34:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:34:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:34:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:34:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:34:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:34:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:34:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:34:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:34:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:34:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:34:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:34:28 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:34:28 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:34:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:34:28 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:34:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:34:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:34:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:34:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:34:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:34:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:34:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:34:28 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:34:28 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:34:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:34:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:34:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:34:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:34:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:34:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:34:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:34:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:34:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:34:29 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:34:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:34:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:34:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:34:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:34:30 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:34:30 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:34:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:34:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:34:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:34:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:34:30 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:34:31 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:34:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:34:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:34:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:34:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:34:31 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:34:32 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:34:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:34:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:34:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:34:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:34:32 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:34:33 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:34:33 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:34:34 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:34:34 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:34:35 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:34:35 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:34:36 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:34:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:34:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:34:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:34:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:34:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:34:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:34:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:34:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:34:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:34:36 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:34:36 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:34:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:34:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:34:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:36 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:34:37 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:34:37 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:34:37 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:34:38 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:34:38 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:34:39 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:34:39 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:34:40 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:34:40 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:34:41 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:34:41 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:34:42 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:34:42 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:34:43 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:34:43 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:34:44 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:34:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:34:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:34:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:34:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:34:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:34:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:34:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:34:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:34:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:34:44 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:34:44 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:34:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:34:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:34:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:44 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 08:34:45 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 08:34:45 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 08:34:45 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 08:34:46 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 08:34:46 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 08:34:47 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 08:34:47 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 08:34:48 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 08:34:48 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 08:34:49 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 08:34:49 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 08:34:50 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 08:34:50 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 08:34:51 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 08:34:51 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 08:34:52 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 08:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:34:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:34:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:34:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:34:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:34:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:34:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:34:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:34:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:34:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:34:52 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:34:52 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:34:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:34:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:34:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:34:52 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 08:34:53 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 08:34:53 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 08:34:53 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 08:34:54 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 08:34:54 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 08:34:55 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 08:34:55 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 08:34:56 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 08:34:56 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 08:34:57 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 08:34:57 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 08:34:58 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 08:34:58 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 08:34:59 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 08:34:59 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 08:35:00 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 08:35:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:35:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:35:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:35:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:35:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:35:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:35:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:35:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:35:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:35:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:35:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:35:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:35:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:35:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:35:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:35:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:35:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:35:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:35:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:35:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:35:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:35:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:35:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:35:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:35:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:35:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:35:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:35:06 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:35:06 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:35:06 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:35:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:35:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:35:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:35:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:35:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:35:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:35:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:35:06 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:35:06 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:35:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:35:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:35:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:35:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:35:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:35:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:35:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:35:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:35:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:35:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:35:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:35:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:35:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:35:07 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:35:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:35:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:35:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:35:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:35:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:35:08 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:35:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:35:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:35:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:35:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:35:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:35:09 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:35:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:35:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:35:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:35:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:35:11 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:35:12 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:35:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:35:13 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:35:13 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:35:13 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:35:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:35:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:35:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:35:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:35:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:35:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:35:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:35:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:35:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:35:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:35:14 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:35:14 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:35:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:35:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:35:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:35:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:14 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:35:14 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:35:15 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:35:15 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:35:16 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:35:16 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:35:17 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:35:17 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:35:18 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:35:18 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:35:19 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:35:19 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:35:20 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:35:20 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:35:21 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:35:21 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:35:21 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:35:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:35:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:35:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:35:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:35:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:35:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:35:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:35:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:35:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:35:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:35:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:35:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:35:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:35:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:35:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:35:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:35:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:35:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:35:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:35:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:35:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:35:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:35:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:35:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:35:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:35:27 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:35:27 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:35:27 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:35:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:35:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:35:27 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:35:27 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:35:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:35:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:35:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:35:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:35:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:35:29 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:35:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:35:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:35:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:35:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:35:29 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:35:29 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:35:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:35:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:35:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:35:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:35:30 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:35:30 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:35:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:35:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:35:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:35:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:35:31 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:35:31 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:35:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:35:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:35:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:35:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:35:32 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:35:32 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:35:33 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:35:33 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:35:34 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:35:34 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:35:35 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:35:35 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:35:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:35:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:35:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:35:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:35:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:35:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:35:35 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:35:35 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:35:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:35:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:36 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:35:36 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:35:37 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:35:37 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:35:37 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:35:38 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:35:38 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:35:39 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:35:39 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:35:40 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:35:40 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:35:41 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:35:41 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:35:42 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:35:42 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:35:43 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:35:43 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:35:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:35:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:35:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:35:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:35:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:35:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:35:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:35:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:35:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:35:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:35:43 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:35:43 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:35:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:35:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:35:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:35:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:44 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 08:35:44 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 08:35:45 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 08:35:45 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 08:35:45 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 08:35:46 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 08:35:46 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 08:35:47 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 08:35:47 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 08:35:48 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 08:35:48 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 08:35:49 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 08:35:49 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 08:35:50 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 08:35:50 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 08:35:51 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 08:35:51 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 08:35:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:35:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:35:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:35:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:35:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:35:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:35:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:35:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:35:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:35:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:35:51 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:35:51 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:35:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:35:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:35:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:35:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:52 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 08:35:52 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 08:35:52 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 08:35:53 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 08:35:53 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 08:35:54 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 08:35:54 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 08:35:55 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 08:35:55 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 08:35:56 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 08:35:56 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 08:35:57 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 08:35:57 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 08:35:58 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 08:35:58 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 08:35:59 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 08:35:59 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 08:35:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:35:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:35:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:35:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:35:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:35:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:35:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:35:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:35:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:35:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:35:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:35:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:35:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:35:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:35:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:36:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:36:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:36:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:36:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:36:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:36:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:36:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:36:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:36:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:36:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:36:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:36:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:36:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:36:05 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:36:05 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:36:05 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:36:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:36:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:36:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:36:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:36:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:36:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:36:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:36:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:36:05 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:36:05 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:36:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:36:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:36:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:36:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:36:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:36:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:36:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:36:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:36:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:36:06 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:36:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:36:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:36:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:36:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:36:07 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:36:07 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:36:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:36:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:36:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:36:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:36:08 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:36:08 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:36:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:36:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:36:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:36:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:36:09 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:36:09 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:36:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:36:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:36:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:36:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:36:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:36:10 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:36:11 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:36:11 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:36:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:36:12 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:36:12 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:36:13 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:36:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:36:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:36:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:36:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:36:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:36:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:36:13 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:36:13 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:36:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:36:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:13 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:36:14 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:36:14 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:36:15 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:36:15 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:36:16 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:36:16 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:36:17 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:36:17 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:36:18 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:36:18 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:36:19 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:36:19 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:36:20 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:36:20 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:36:20 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:36:21 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:36:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:36:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:36:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:36:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:36:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:36:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:36:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:36:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:36:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:36:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:36:21 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:36:21 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:36:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:36:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:36:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:36:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:21 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 08:36:22 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 08:36:22 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 08:36:23 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 08:36:23 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 08:36:24 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 08:36:24 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 08:36:25 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 08:36:25 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 08:36:26 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 08:36:26 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 08:36:27 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 08:36:27 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 08:36:27 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 08:36:28 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 08:36:28 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 08:36:29 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 08:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:36:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:36:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:36:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:36:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:36:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:36:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:36:29 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:36:29 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:36:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:36:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:29 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 08:36:30 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 08:36:30 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 08:36:31 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 08:36:31 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 08:36:32 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 08:36:32 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 08:36:33 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 08:36:33 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 08:36:34 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 08:36:34 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 08:36:35 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 08:36:35 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 08:36:35 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 08:36:36 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 08:36:36 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 08:36:37 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 08:36:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:36:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:36:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:36:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:36:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:36:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:36:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:36:37 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:36:37 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:36:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:36:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:36:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:37 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 08:36:38 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 08:36:38 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 08:36:39 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 08:36:39 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 08:36:40 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 08:36:40 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 08:36:41 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 08:36:41 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-24 08:36:42 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-24 08:36:42 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-24 08:36:43 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-24 08:36:43 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-24 08:36:43 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-24 08:36:44 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-24 08:36:44 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-24 08:36:45 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-24 08:36:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:36:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:36:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:36:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:36:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:36:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:36:45 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-24 08:36:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:36:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:36:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:36:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:36:45 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:36:45 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:36:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:36:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:36:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:36:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:46 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-24 08:36:46 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-24 08:36:47 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-24 08:36:47 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-24 08:36:48 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-24 08:36:48 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-24 08:36:49 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-24 08:36:49 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-24 08:36:50 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-24 08:36:50 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-24 08:36:50 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-24 08:36:51 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-24 08:36:51 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-24 08:36:52 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-24 08:36:52 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-24 08:36:53 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-24 08:36:53 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-24 08:36:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:36:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:36:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:36:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:36:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:36:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:36:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:36:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:36:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:36:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:36:53 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:36:53 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:36:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:36:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:36:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:36:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:36:54 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-24 08:36:54 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-24 08:36:55 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-24 08:36:55 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-24 08:36:56 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-24 08:36:56 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-24 08:36:57 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-24 08:36:57 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-24 08:36:58 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-24 08:36:58 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-24 08:36:58 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-24 08:36:59 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-24 08:36:59 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-24 08:37:00 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-24 08:37:00 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-24 08:37:01 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-24 08:37:01 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-24 08:37:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:37:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:37:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:37:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:37:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:37:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:37:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:37:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:37:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:37:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:37:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:37:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:37:01 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:37:01 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:37:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:37:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:37:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:37:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:37:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:37:02 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-24 08:37:02 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-24 08:37:03 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-24 08:37:03 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-24 08:37:04 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-24 08:37:04 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-24 08:37:05 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-24 08:37:05 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-24 08:37:06 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-24 08:37:06 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-24 08:37:06 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-24 08:37:07 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-24 08:37:07 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-24 08:37:08 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-24 08:37:08 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-24 08:37:09 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-24 08:37:09 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-24 08:37:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:37:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:37:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:37:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:37:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:37:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:37:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:37:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:37:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:37:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:37:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:37:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:37:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:37:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:37:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:37:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:37:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:37:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:37:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:37:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:37:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:37:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:37:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:37:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:37:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:37:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:37:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:37:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:37:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:37:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:37:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:37:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:37:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:37:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:37:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:37:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:37:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:37:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:37:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:37:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:37:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:37:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:37:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:37:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:37:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:37:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:37:20 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:37:20 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:37:20 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:37:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:37:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:37:20 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:37:20 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:37:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:37:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:37:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:37:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:37:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:37:21 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:37:21 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:37:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:37:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:37:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:37:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:37:22 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:37:22 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:37:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:37:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:37:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:37:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:37:23 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:37:23 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:37:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:37:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:37:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:37:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:37:24 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:37:24 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:37:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:37:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:37:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:37:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:37:25 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:37:25 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:37:26 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:37:26 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:37:27 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:37:27 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:37:28 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:37:28 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:37:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:37:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:37:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:37:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:37:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:37:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:37:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:37:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:37:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:37:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:37:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:37:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:37:28 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:37:28 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:37:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:37:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:37:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:37:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:37:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:37:28 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:37:29 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:37:29 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:37:30 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:37:30 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:37:31 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:37:31 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:37:32 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:37:32 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:37:33 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:37:33 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:37:34 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:37:34 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:37:35 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:37:35 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:37:36 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:37:36 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:37:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:37:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:37:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:37:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:37:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:37:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:37:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:37:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:37:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:37:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:37:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:37:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:37:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:37:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:37:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:37:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:37:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:37:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:37:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:37:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:37:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:37:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:37:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:37:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:37:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:37:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:37:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:37:42 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:37:42 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:37:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:37:42 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:37:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:37:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:37:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:37:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:37:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:37:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:37:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:37:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:37:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:37:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:37:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:37:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:37:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:37:42 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:37:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:37:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:37:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:37:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:37:43 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:37:43 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:37:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:37:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:37:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:37:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:37:44 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:37:44 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:37:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:37:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:37:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:37:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:37:45 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:37:45 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:37:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:37:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:37:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:37:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:37:45 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:37:46 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:37:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:37:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:37:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:37:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:37:46 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:37:47 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:37:47 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:37:48 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:37:48 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:37:49 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:37:49 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:37:50 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:37:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:37:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:37:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:37:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:37:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:37:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:37:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:37:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:37:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:37:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:37:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:37:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:37:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:37:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:37:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:37:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:37:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:37:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:37:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:37:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:37:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:37:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:37:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:37:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:37:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:37:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:37:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:37:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:37:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:37:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:37:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:37:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:37:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:37:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:37:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:37:55 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:37:55 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:37:55 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:37:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:37:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:37:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:37:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:37:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:37:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:37:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:37:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:37:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:37:57 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:37:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:37:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:37:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:37:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:37:57 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:37:58 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:37:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:37:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:37:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:37:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:37:58 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:37:59 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:37:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:37:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:37:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:37:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:37:59 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:38:00 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:38:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:38:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:38:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:38:00 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:38:01 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:38:01 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:38:01 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:38:02 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:38:02 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:38:03 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:38:03 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:38:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:38:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:38:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:38:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:38:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:38:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:38:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:38:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:38:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:38:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:38:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:38:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:38:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:38:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:38:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:38:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:38:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:38:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:38:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:38:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:38:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:38:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:38:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:38:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:38:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:38:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:38:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:38:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:38:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:38:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:38:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:38:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:38:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:38:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:38:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:38:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:38:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:38:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:38:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:38:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:38:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:38:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:38:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:38:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:38:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:38:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:38:09 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:38:09 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:38:09 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:38:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:38:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:38:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:38:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:38:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:38:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:38:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:38:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:38:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:38:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:38:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:38:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:38:11 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:38:11 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:38:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:38:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:38:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:38:12 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:38:12 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:38:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:38:13 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:38:13 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:38:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:38:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:38:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:38:14 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:38:14 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:38:15 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:38:15 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:38:16 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:38:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:38:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:38:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:38:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:38:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:38:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:38:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:38:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:38:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:38:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:38:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:38:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:38:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:38:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:38:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:38:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:38:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:38:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:38:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:38:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:38:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:38:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:38:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:38:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:38:21 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:38:21 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:38:21 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:38:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:38:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:38:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:38:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:38:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:38:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:38:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:38:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:38:23 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:38:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:38:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:38:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:38:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:38:24 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:38:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:38:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:38:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:38:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:38:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:38:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:38:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:38:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:38:25 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:38:25 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:38:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:38:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:38:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:38:26 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:38:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:38:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:38:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:38:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:38:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:38:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:38:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:38:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:38:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:38:26 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:38:27 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:38:27 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:38:28 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:38:28 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:38:29 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:38:29 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:38:30 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:38:30 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:38:31 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:38:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:38:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:38:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:38:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:38:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:38:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:38:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:38:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:38:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:38:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:38:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:38:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:38:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:38:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:38:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:38:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:38:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:38:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:38:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:38:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:38:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:38:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:38:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:38:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:38:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:38:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:38:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:38:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:38:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:38:37 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:38:37 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:38:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:38:37 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:38:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:38:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:38:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:38:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:38:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:38:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:38:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:38:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:38:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:38:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:38:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:38:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:38:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:38:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:38:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:38:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:38:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:38:38 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:38:39 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:38:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:38:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:38:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:38:39 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:38:40 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:38:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:38:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:38:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:38:40 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:38:41 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:38:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:38:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:38:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:38:41 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:38:42 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:38:42 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:38:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:43 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:38:43 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:38:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:44 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:38:44 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:38:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:44 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:38:45 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:38:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:45 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:38:46 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:38:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:38:46 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:38:47 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:38:47 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:38:48 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:38:48 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:38:49 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:38:49 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:38:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:38:50 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:38:50 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:38:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:51 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:38:51 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:38:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:51 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:38:52 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:38:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:52 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:38:53 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 08:38:53 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 08:38:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:54 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 08:38:54 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 08:38:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:55 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 08:38:55 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 08:38:56 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 08:38:56 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 08:38:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:38:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:38:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:38:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:38:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:38:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:38:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:38:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:38:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:38:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:38:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:38:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:38:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:39:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:39:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:39:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:39:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:39:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:39:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:39:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:39:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:39:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:39:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:39:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:39:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:39:02 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:39:02 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:39:02 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:39:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:39:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:39:02 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:39:02 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:39:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:02 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:03 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:03 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:03 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:03 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:03 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:03 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:39:03 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:03 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:03 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:03 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:03 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:03 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:03 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:03 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=214 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:03 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=215 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:03 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:03 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=217 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:03 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=218 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:03 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=219 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:39:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:39:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:39:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:39:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 08:39:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:39:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:39:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:39:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:39:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:39:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:39:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:39:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:39:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:39:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:39:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:39:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:39:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:39:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:39:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:39:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:39:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:39:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:39:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:39:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:39:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:39:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:39:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:39:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:39:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:39:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:39:09 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:39:09 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:39:09 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:39:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:39:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:39:09 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:39:09 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=214 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=215 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=217 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=218 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:39:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:39:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:39:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:39:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:39:09 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=301 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:39:09 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=301 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:39:09 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=301 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:39:09 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=301 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:39:09 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=301 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:39:09 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=301 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:39:09 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=301 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:39:09 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=301 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:39:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:39:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:39:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:39:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:39:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:39:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:39:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:39:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:39:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:39:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:39:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:39:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:39:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:39:15 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:39:15 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:39:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:39:15 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:39:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:39:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:39:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:39:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:39:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:39:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:39:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:39:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:39:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:39:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:39:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:39:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:39:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:39:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:39:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:39:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:39:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:39:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:39:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:39:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:39:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:39:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:39:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:39:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:39:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:39:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:39:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:39:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:39:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:39:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:39:18 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:39:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:39:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:39:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:39:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:39:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:39:19 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:39:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:39:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:39:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:39:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:39:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:39:20 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:39:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:39:21 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:39:21 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:39:22 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:39:22 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:39:22 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:39:23 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:39:23 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:39:24 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:39:24 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:39:25 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:39:25 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:39:26 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:39:26 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:39:27 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:39:27 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:39:28 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:39:28 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:39:29 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:39:29 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:39:30 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:39:30 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:39:30 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:39:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:39:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:39:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:39:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:39:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:39:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:39:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:39:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:39:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:39:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:39:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:39:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:39:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:39:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:39:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:39:31 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:39:31 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 08:39:32 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 08:39:32 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 08:39:33 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 08:39:33 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 08:39:34 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 08:39:34 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 08:39:35 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 08:39:35 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 08:39:36 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 08:39:36 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 08:39:37 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 08:39:37 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 08:39:38 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 08:39:38 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 08:39:38 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 08:39:39 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 08:39:39 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 08:39:40 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 08:39:40 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 08:39:41 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 08:39:41 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 08:39:42 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 08:39:42 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 08:39:43 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 08:39:43 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 08:39:44 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 08:39:44 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 08:39:45 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 08:39:45 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 08:39:46 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 08:39:46 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 08:39:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:39:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:39:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:39:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:39:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:39:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:39:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:39:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:39:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:39:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:39:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:39:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:39:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:39:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:39:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:39:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:39:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:39:46 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 08:39:47 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 08:39:47 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 08:39:48 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 08:39:48 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 08:39:49 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 08:39:49 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 08:39:50 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 08:39:50 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 08:39:51 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 08:39:51 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-24 08:39:52 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-24 08:39:52 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-24 08:39:53 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-24 08:39:53 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-24 08:39:54 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-24 08:39:54 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-24 08:39:54 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-24 08:39:55 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-24 08:39:55 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-24 08:39:56 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-24 08:39:56 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-24 08:39:57 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-24 08:39:57 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-24 08:39:58 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-24 08:39:58 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-24 08:39:59 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-24 08:39:59 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-24 08:40:00 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-24 08:40:00 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-24 08:40:01 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-24 08:40:01 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-24 08:40:02 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-24 08:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:40:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:40:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:40:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:40:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:40:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:40:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:40:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:40:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:40:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:40:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:40:02 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-24 08:40:02 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-24 08:40:03 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-24 08:40:03 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-24 08:40:04 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-24 08:40:04 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-24 08:40:05 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-24 08:40:05 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-24 08:40:06 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-24 08:40:06 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-24 08:40:07 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-24 08:40:07 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-24 08:40:08 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-24 08:40:08 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-24 08:40:09 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-24 08:40:09 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-24 08:40:10 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-24 08:40:10 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-24 08:40:10 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-24 08:40:11 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-24 08:40:11 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-24 08:40:12 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-24 08:40:12 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-24 08:40:13 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-24 08:40:13 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-24 08:40:14 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-24 08:40:14 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-24 08:40:15 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-24 08:40:15 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-24 08:40:16 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-24 08:40:16 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-24 08:40:17 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-24 08:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:40:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:40:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:40:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:40:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:40:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:40:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:40:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:40:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:40:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:40:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:40:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:40:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:40:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:40:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:40:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:40:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:40:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:40:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:40:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:40:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:40:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:40:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:40:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:40:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:40:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:40:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:40:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:40:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:40:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:40:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:40:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:40:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:40:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:40:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:40:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:40:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:40:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:40:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:40:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:40:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:40:28 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:40:28 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:40:28 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:40:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:40:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:40:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:40:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:40:28 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:40:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:40:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:40:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:40:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:40:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:40:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:40:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:40:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:40:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:40:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:40:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:40:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:40:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:40:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:40:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:40:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:40:29 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:40:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:40:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:40:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:40:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:40:29 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:40:30 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:40:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:40:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:40:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:40:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:40:30 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:40:31 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:40:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:40:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:40:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:40:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:40:31 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:40:32 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:40:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:40:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:40:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:40:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:40:32 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:40:33 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:40:33 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:40:34 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:40:34 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:40:35 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:40:35 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:40:36 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:40:36 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:40:36 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:40:37 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:40:37 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:40:38 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:40:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:40:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:40:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:40:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:40:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:40:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:40:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:40:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:40:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:40:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:40:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:40:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:40:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:40:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:40:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:40:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:40:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:40:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:40:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:40:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:40:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:40:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:40:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:40:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:40:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:40:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:40:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:40:44 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:40:44 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:40:44 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:40:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:40:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:40:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:40:44 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:40:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:40:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:40:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:40:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:40:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:40:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:40:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:40:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:40:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:40:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:40:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:40:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:40:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:40:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:40:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:40:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:40:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:40:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:40:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:40:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:40:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:40:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:40:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:40:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:40:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:40:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:40:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:40:47 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:40:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:40:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:40:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:40:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:40:47 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:40:48 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:40:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:40:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:40:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:40:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:40:48 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:40:49 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:40:49 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:40:50 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:40:50 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:40:51 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:40:51 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:40:52 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:40:52 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:40:52 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:40:53 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:40:53 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:40:54 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:40:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:40:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:40:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:40:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:40:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:40:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:40:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:40:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:40:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:40:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:40:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:40:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:40:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:40:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:40:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:40:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:40:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:40:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:40:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:40:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:40:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:40:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:40:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:40:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:40:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:40:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:40:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:41:00 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:41:00 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:41:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:41:00 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:41:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:41:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:41:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:41:00 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:41:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:41:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:41:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:41:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:41:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:41:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:41:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:41:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:41:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:41:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:41:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:41:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:41:01 [DEBUG] fake_trx.py:263 (MS@172.18.90.22:6700) Recv SETTA cmd
2024-10-24 08:41:01 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:41:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:41:02 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:41:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:02 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:41:03 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:41:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:03 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:41:04 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:41:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:04 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:41:05 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:41:05 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:41:06 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:41:06 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:41:07 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:41:07 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:41:08 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:41:08 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:41:09 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:41:09 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:41:09 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:41:10 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:41:10 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:41:11 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:41:11 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:41:12 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:41:12 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:41:13 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:41:13 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:41:14 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:41:14 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:41:15 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:41:15 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:41:16 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:41:16 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 08:41:16 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 08:41:17 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 08:41:17 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 08:41:18 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 08:41:18 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 08:41:19 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 08:41:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:41:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:41:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:41:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:41:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:41:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:41:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:41:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:41:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:41:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:41:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:41:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:41:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:41:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:41:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:41:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:41:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:41:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:41:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:41:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:41:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:41:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:41:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:41:25 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:41:25 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:41:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:41:25 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:41:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:41:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:41:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:41:25 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:41:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:41:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:41:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:41:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:41:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:41:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:41:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:41:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:41:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:41:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:41:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:41:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:41:26 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:41:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:27 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:41:27 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:41:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:28 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:41:28 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:41:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:29 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:41:29 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:41:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:29 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:41:30 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:41:30 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:41:31 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:41:31 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:41:32 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:41:32 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:41:33 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:41:33 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:41:34 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:41:34 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:41:35 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:41:35 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:41:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:41:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:41:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:41:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:41:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:41:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:41:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:41:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:41:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:41:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:41:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:41:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:41:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:41:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:41:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:41:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:41:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:41:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:41:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:41:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:41:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:41:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:41:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:41:41 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:41:41 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:41:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:41:41 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:41:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:41:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:41:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:41:41 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:41:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:41:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:41:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:41:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:41:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:41:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:41:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:41:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:41:41 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:41:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:41:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:41:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:41:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:41:42 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:41:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:41:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:43 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:41:43 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:41:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:44 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:41:44 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:41:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:45 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:41:45 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:41:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:45 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:41:46 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:41:46 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:41:47 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:41:47 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:41:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:41:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:41:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:41:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:41:47 [WARNING] transceiver.py:250 (MS@172.18.90.22:6700) RX TRXD message (fn=1560 tn=4 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:41:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:41:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:41:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:41:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:41:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:41:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1562 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:41:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:41:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:41:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:41:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:41:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:41:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:41:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:41:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:41:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:41:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:41:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:41:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:41:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:41:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:41:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:41:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:41:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:41:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:41:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:41:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:41:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:41:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:41:53 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:41:53 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:41:53 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:41:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:41:53 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:41:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:41:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:41:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:41:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:41:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:41:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:41:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:56 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:41:56 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:41:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:57 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:41:57 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:41:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:41:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:41:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:41:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:41:58 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:41:58 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:41:59 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:41:59 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:42:00 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:42:00 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:42:02 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:42:02 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:42:03 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:42:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:42:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:42:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:42:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:42:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:42:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:42:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:42:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:42:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:42:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:42:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:42:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:42:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:42:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:42:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:42:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:42:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:42:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:42:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:42:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:42:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:42:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:42:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:42:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:42:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:42:09 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:42:09 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:42:09 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:42:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:42:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:42:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:42:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:42:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:42:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:42:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:42:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:42:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:42:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:42:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:42:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:42:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:42:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:42:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:42:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:42:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:42:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:42:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:42:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:42:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:42:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:42:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:42:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:42:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:42:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:42:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:42:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:42:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:42:16 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:42:16 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:42:16 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:42:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:42:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:42:16 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:42:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:42:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:42:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:42:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:42:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:42:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:42:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:42:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:42:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:42:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:42:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:42:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:42:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:42:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:42:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:42:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:42:22 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:42:22 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:42:22 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:42:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:42:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:42:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:42:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:42:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:42:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:42:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:42:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:42:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:42:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:42:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:42:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:42:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:42:23 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:42:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:42:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:42:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:42:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:42:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:42:24 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:42:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:42:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:42:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:42:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:42:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:42:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:42:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:42:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:42:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:42:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:42:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:42:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:42:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:42:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:42:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:42:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:42:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:25 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:42:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:42:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:42:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:42:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:42:26 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:42:26 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:42:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:42:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:42:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:42:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:42:27 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:42:27 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:42:28 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:42:28 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:42:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:42:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:42:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:42:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:42:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:42:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:42:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:42:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:42:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:42:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:42:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:42:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:29 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:42:29 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:42:29 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:42:30 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:42:30 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:42:31 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:42:31 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:42:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:42:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:42:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:42:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:42:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:42:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:42:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:42:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:42:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:32 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:42:32 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:42:33 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:42:33 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:42:34 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:42:34 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:42:35 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:42:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:42:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:42:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:42:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:42:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:42:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:42:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:42:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:42:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:42:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:42:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:42:35 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2884 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:42:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:42:35 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2884 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:42:35 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2884 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:42:35 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2884 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:42:35 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2884 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:42:35 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2884 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:42:35 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2884 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:42:35 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2884 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:42:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:42:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:42:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:42:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:42:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:42:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:42:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:42:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:42:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:42:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:42:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:42:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:42:40 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:42:40 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:42:40 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:42:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:42:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:42:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:42:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:42:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:42:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:42:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:42:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:42:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:42:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:42:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:42:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:42:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:42:43 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:42:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:42:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:42:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:42:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:42:43 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:42:44 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:42:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:42:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:42:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:42:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:42:44 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:42:44 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:42:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:42:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:42:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:42:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:42:45 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:42:45 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:42:46 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:42:46 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:42:47 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:42:47 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:42:48 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:42:48 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:42:49 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:42:49 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:42:50 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:42:50 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:42:51 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:42:51 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:42:52 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:42:52 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:42:52 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:42:53 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:42:53 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:42:54 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:42:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:42:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:42:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:42:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:42:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:42:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:42:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:42:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:42:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:42:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:42:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:42:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:42:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:42:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:42:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:42:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:42:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:42:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:42:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:42:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:42:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:42:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:42:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:42:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:42:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:43:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:43:00 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:43:00 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:43:00 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:43:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:43:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:43:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:43:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:43:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:43:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:43:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:43:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:43:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:43:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:43:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:43:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:43:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:43:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:43:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:43:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:43:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:43:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:43:01 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:43:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:43:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:43:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:43:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:43:02 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:43:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:43:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:43:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:43:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:43:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:43:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:43:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:43:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:43:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:43:02 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:43:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:43:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:43:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:43:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:43:02 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:43:03 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:43:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:43:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:43:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:43:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:43:03 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:43:04 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:43:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:43:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:43:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:43:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:43:04 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:43:05 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:43:05 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:43:06 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:43:06 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:43:07 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:43:07 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:43:08 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:43:08 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:43:09 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:43:09 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:43:10 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:43:10 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:43:10 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:43:11 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:43:11 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:43:12 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:43:12 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:43:13 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:43:13 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:43:14 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:43:14 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:43:15 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:43:15 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:43:16 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:43:16 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 08:43:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:43:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:43:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:43:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:43:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:43:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:43:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:43:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:43:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:43:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:43:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:43:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:43:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:43:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:43:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:43:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:43:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:43:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:43:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:43:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:43:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:43:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:43:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:43:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:43:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:43:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:43:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:43:22 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:43:22 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:43:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:43:22 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:43:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:43:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:43:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:43:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:43:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:43:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:43:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:43:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:43:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:43:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:43:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:43:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:43:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:43:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:43:23 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:43:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:43:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:43:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:43:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:43:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:43:24 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:43:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:43:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:43:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:43:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:43:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:43:25 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:43:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:43:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:43:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:43:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:43:26 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:43:26 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:43:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:43:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:43:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:43:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:43:27 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:43:27 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:43:28 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:43:28 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:43:28 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:43:29 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:43:29 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:43:30 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:43:30 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:43:31 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:43:31 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:43:32 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:43:32 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:43:33 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:43:33 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:43:34 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:43:34 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:43:35 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:43:35 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:43:36 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:43:36 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:43:36 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:43:37 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:43:37 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 08:43:39 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 08:43:39 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 08:43:40 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 08:43:40 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 08:43:41 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 08:43:41 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 08:43:42 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 08:43:42 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 08:43:43 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 08:43:43 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 08:43:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:43:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:43:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:43:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:43:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:43:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:43:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:43:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:43:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:43:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:43:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:43:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:43:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:43:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:43:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:43:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:43:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:43:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:43:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:43:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:43:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:43:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:43:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:43:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:43:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:43:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:43:49 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:43:49 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:43:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:43:49 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:43:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:43:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:43:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:43:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:43:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:43:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:43:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:43:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:43:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:43:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:43:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:43:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:43:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:43:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:43:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:43:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:43:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:43:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:43:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:43:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:43:51 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:43:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:43:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:43:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:43:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:43:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:43:52 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:43:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:43:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:43:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:43:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:43:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:43:53 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:43:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:43:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:43:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:43:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:43:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:43:54 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:43:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:43:55 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:43:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:43:56 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:43:56 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:43:58 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:43:58 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:43:59 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:43:59 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:44:00 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:44:00 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:44:01 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:44:01 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:44:02 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:44:02 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:44:03 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:44:03 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:44:03 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:44:04 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:44:04 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:44:05 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:44:05 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 08:44:06 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 08:44:06 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 08:44:07 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 08:44:07 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 08:44:08 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 08:44:08 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 08:44:09 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 08:44:09 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 08:44:10 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 08:44:10 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 08:44:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:44:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:44:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:44:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:44:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:44:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:44:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:44:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:44:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:44:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:44:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:44:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:44:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:44:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4786 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:44:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4786 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:44:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:44:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:44:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:44:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:44:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:44:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:44:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:44:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:44:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:44:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:44:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:44:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:44:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:44:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:44:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:44:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:44:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:44:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:44:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:44:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:44:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:44:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:44:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:44:16 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:44:16 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:44:16 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:44:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:44:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:44:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:44:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:44:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:44:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:44:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:44:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:44:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:44:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:44:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:44:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:44:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:44:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:44:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:44:18 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:44:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:44:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:44:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:44:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:44:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:44:19 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:44:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:44:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:44:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:44:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:44:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:44:20 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:44:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:44:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:44:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:44:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:44:21 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:44:21 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:44:22 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:44:22 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:44:23 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:44:23 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:44:24 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:44:24 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:44:24 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:44:25 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:44:25 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:44:26 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:44:26 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:44:27 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:44:27 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:44:28 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:44:28 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:44:29 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:44:29 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:44:30 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:44:30 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:44:31 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:44:31 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:44:31 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:44:32 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:44:32 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 08:44:33 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 08:44:33 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 08:44:34 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 08:44:34 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 08:44:35 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 08:44:35 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 08:44:36 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 08:44:36 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 08:44:37 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 08:44:37 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 08:44:38 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 08:44:38 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 08:44:39 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 08:44:39 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 08:44:39 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 08:44:40 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 08:44:40 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 08:44:41 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 08:44:41 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 08:44:42 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 08:44:42 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 08:44:43 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 08:44:43 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 08:44:44 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 08:44:44 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 08:44:45 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 08:44:45 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 08:44:46 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 08:44:46 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 08:44:46 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 08:44:47 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 08:44:47 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 08:44:48 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 08:44:48 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 08:44:49 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 08:44:49 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 08:44:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:44:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:44:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:44:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:44:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:44:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:44:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:44:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:44:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:44:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:44:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:44:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:44:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:44:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:44:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:44:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:44:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:44:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:44:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:44:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:44:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:44:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:44:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:44:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:44:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:44:55 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:44:55 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:44:55 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:44:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:44:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:44:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:44:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:44:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:44:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:44:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:44:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:44:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:44:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:44:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:44:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:44:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:44:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:44:57 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:44:57 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:44:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:44:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:44:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:44:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:44:58 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:44:58 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:44:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:44:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:44:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:44:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:44:59 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:44:59 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:45:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:45:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:45:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:45:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:45:00 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:45:00 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:45:01 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:45:01 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:45:02 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:45:02 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:45:03 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:45:03 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:45:04 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:45:04 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:45:04 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:45:05 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:45:05 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:45:06 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:45:06 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:45:07 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:45:07 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:45:08 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:45:08 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:45:09 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:45:09 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:45:10 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:45:10 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:45:11 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:45:11 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:45:12 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 08:45:12 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 08:45:12 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 08:45:13 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 08:45:13 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 08:45:14 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 08:45:14 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 08:45:15 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 08:45:15 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 08:45:16 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 08:45:16 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 08:45:17 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 08:45:17 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 08:45:18 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 08:45:18 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 08:45:19 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 08:45:19 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 08:45:19 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 08:45:20 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 08:45:20 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 08:45:21 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 08:45:21 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 08:45:22 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 08:45:22 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 08:45:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:45:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:45:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:45:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:45:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:45:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:45:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:45:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:45:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:45:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:45:23 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6088 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:45:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:45:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:45:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:45:23 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6088 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:45:23 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6088 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:45:23 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6088 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:45:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:45:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:45:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:45:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:45:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:45:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:45:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:45:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:45:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:45:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:45:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:45:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:45:28 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:45:28 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:45:28 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:45:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:45:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:45:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:45:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:45:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:45:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:45:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:45:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:45:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:45:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:45:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:45:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:45:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:45:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:45:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:45:34 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:45:34 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:45:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:45:34 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:45:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:45:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:45:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:45:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:45:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:45:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:45:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:45:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:45:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:45:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:45:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:45:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:45:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:45:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:45:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:45:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:45:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:45:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:45:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:45:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:45:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:45:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:45:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:45:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:45:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:45:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:45:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:45:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:45:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:45:39 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:45:39 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:45:39 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:45:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:45:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:45:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:45:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:45:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:45:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:45:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:45:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:45:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:45:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:45:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:45:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:45:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:45:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:45:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:45:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:45:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:45:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:45:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:45:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:45:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:45:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:45:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:45:45 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:45:45 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:45:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:45:45 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:45:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:45:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:45:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:45:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:45:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:45:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:45:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:45:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:45:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:45:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:45:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:45:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:45:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:45:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:45:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:45:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:45:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:45:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:45:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:45:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:45:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:45:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:45:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:45:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:45:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:45:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:45:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:45:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:45:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:45:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:45:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:45:49 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:45:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:45:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:45:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:45:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:45:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:45:50 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:45:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:45:50 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:45:51 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:45:51 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:45:52 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:45:52 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:45:53 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:45:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:45:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:45:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:45:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:45:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:45:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:45:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:45:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:45:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:45:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:45:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:45:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:45:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:45:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:45:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:45:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:45:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:45:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:45:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:45:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:45:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:45:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:45:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:45:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:45:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:45:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:45:59 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:45:59 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:45:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:45:59 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:45:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:45:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:45:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:45:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:45:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:45:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:45:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:45:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:45:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:45:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:45:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:45:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:45:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:45:59 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:46:00 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:46:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:00 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:46:01 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:46:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:01 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:46:02 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:46:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:02 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:46:03 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:46:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:03 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:46:04 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:46:04 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:46:05 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:46:05 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:46:06 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:46:06 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:46:06 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:46:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:46:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:46:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:46:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:46:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:46:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:46:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:46:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:46:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:46:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:46:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:46:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:46:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:46:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:46:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:46:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:46:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:46:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:46:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:46:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:46:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:46:12 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:46:12 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:46:12 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:46:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:46:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:46:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:46:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:46:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:46:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:46:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:14 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:46:14 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:46:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:15 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:46:15 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:46:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:16 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:46:16 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:46:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:17 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:46:17 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:46:18 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:46:18 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:46:19 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:46:19 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:46:20 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:46:20 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:46:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:46:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:46:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:46:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:46:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:46:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:46:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:46:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:46:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:46:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:46:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:46:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:46:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:46:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:46:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:46:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:46:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:46:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:46:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:46:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:46:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:46:26 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:46:26 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:46:26 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:46:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:46:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:46:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:46:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:46:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:46:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:46:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:46:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:46:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:46:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:46:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:46:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:46:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:46:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:29 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:46:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:46:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:46:31 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:46:32 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:46:32 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:46:33 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:46:33 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:46:34 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:46:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:46:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:46:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:46:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:46:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:46:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:46:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:46:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:46:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:46:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:46:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:46:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:46:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:46:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:46:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:46:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:46:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:46:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:46:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:46:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:46:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:46:39 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:46:39 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:46:39 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:46:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:46:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:46:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:46:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:46:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:46:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:46:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:46:42 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:46:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:42 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:46:43 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:46:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:43 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:46:44 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:46:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:44 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:46:44 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:46:45 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:46:45 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:46:46 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:46:46 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:46:47 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:46:47 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:46:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:46:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:46:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:46:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:46:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:46:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:46:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:46:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:46:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:46:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:46:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:46:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:46:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:46:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:46:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:46:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:46:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:46:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:46:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:46:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:46:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:46:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:46:53 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:46:53 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:46:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:46:53 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:46:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:46:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:46:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:46:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:46:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:46:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:46:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:46:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:46:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:46:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:46:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:46:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:46:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:46:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:56 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:46:56 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:46:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:57 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:46:57 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:46:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:46:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:46:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:46:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:46:58 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:46:58 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:46:59 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:46:59 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:47:00 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:47:00 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:47:00 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:47:01 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:47:01 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:47:04 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:47:04 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:47:05 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:47:05 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:47:06 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:47:06 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:47:07 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:47:07 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:47:07 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:47:08 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:47:08 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:47:09 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:47:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:47:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:47:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:47:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:47:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:47:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:47:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:47:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:47:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:47:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:47:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:47:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:47:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:47:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:47:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:47:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:47:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:47:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:47:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:47:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:47:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:47:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:47:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:47:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:47:15 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:47:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:47:15 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:47:15 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:47:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:47:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:47:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:47:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:47:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:47:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:47:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:47:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:47:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:47:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:47:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:47:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:47:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:47:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:47:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:47:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:47:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:47:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:47:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:47:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:47:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:47:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:47:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:47:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:47:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:47:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:47:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:47:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:47:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:47:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:47:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:47:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:47:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:47:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:47:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:47:19 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:47:21 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:47:21 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:47:22 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:47:22 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:47:23 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:47:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:47:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:47:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:47:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:47:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:47:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:47:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:47:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:47:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:47:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:47:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:47:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:47:23 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:47:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:47:23 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:47:23 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:47:23 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:47:23 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:47:23 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:47:23 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:47:23 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:47:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:47:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:47:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:47:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:47:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:47:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:47:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:47:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:47:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:47:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:47:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:47:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:47:28 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:47:28 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:47:28 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:47:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:47:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:47:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:47:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:47:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:47:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:47:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:47:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:47:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:47:30 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:47:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:47:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:47:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:47:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:47:30 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:47:31 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:47:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:47:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:47:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:47:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:47:31 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:47:31 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:47:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:47:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:47:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:47:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:47:32 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:47:32 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:47:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:47:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:47:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:47:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:47:33 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:47:33 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:47:34 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:47:34 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:47:35 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:47:35 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:47:36 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:47:36 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:47:37 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:47:37 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:47:38 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:47:38 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:47:38 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:47:40 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:47:40 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:47:41 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:47:41 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:47:42 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:47:42 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:47:43 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:47:43 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:47:44 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:47:44 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:47:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:47:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:47:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:47:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:47:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:47:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:47:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:47:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:47:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:47:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:47:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:47:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:47:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:47:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:47:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:47:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:47:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:47:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:47:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:47:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:47:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:47:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:47:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:47:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:47:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:47:50 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:47:50 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:47:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:47:50 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:47:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:47:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:47:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:47:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:47:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:47:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:47:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:47:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:47:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:47:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:47:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:47:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:47:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:47:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:47:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:47:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:47:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:47:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:47:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:47:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:47:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:47:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:47:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:47:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:47:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:47:55 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:47:55 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:47:55 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:47:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:47:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:47:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:47:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:48:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:48:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:48:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:48:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:48:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:48:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:48:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:48:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:48:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:48:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:48:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:48:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:48:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:48:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:48:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:48:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:48:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:48:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:48:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:48:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:48:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:48:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:48:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:48:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:48:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:48:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:48:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:48:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:48:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:48:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:48:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:48:01 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:48:01 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:48:01 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:48:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:48:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:48:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:48:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:48:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:48:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:48:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:48:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:48:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:48:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:48:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:48:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:48:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:48:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:48:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:48:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:48:07 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:48:07 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:48:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:48:07 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:48:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:48:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:48:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:48:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:48:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:48:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:48:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:48:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:48:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:48:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:48:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:48:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:48:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:48:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:48:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:48:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:48:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:48:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:48:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:48:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:48:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:48:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:48:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:48:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:48:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:48:12 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:48:12 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:48:12 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:48:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:48:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:48:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:48:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:48:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:48:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:48:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:48:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:48:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:48:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:48:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:48:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:48:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:48:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:48:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:48:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:48:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:48:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:48:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:48:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:48:18 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:48:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:48:18 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:48:18 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:48:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:48:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:48:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:48:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:48:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:48:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:48:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:48:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:48:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:48:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:48:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:48:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:48:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:48:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:48:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:48:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:48:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:48:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:48:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:48:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:48:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:48:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:48:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:48:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:48:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:48:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:48:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:48:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:48:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:48:23 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:48:23 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:48:23 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:48:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:48:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:48:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:48:24 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:48:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:48:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:48:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:48:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:48:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:48:25 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:48:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:48:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:48:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:48:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:48:25 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:48:26 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:48:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:48:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:48:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:48:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:48:26 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:48:27 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:48:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:48:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:48:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:48:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:48:27 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:48:28 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:48:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:48:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:48:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:48:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:48:28 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:48:29 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:48:29 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:48:30 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:48:30 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:48:30 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:48:31 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:48:31 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:48:32 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:48:32 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:48:33 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:48:33 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:48:34 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:48:34 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:48:35 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:48:35 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:48:36 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:48:36 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:48:37 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:48:37 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:48:39 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:48:39 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:48:40 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 08:48:40 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 08:48:41 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 08:48:41 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 08:48:42 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 08:48:42 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 08:48:43 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 08:48:43 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 08:48:44 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 08:48:44 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 08:48:45 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 08:48:45 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 08:48:45 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 08:48:46 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 08:48:46 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 08:48:47 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 08:48:47 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 08:48:48 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 08:48:48 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 08:48:49 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 08:48:49 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 08:48:50 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 08:48:50 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 08:48:51 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 08:48:51 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 08:48:52 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 08:48:52 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 08:48:53 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 08:48:53 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 08:48:53 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 08:48:54 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 08:48:54 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 08:48:55 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 08:48:55 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 08:48:56 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 08:48:56 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 08:48:57 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 08:48:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:48:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:48:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:48:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:48:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:48:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:48:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:48:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:48:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:48:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:48:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:48:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:48:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:49:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:49:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:49:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:49:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:49:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:49:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:49:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:49:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:49:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:49:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:49:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:49:03 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:49:03 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:49:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:49:03 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:49:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:49:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:03 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:49:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:49:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:04 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:49:05 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:49:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:05 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:49:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:49:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:49:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:49:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:49:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:49:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:49:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:49:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:49:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:49:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:49:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:49:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:49:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:49:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:49:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:49:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:49:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:49:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:49:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:49:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:49:11 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:49:11 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:49:11 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:49:12 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:49:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:12 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:49:13 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:49:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:13 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:49:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:49:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:14 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:49:14 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:49:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:15 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:49:15 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:49:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:16 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:49:16 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:49:17 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:49:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:49:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:49:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:49:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:49:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:49:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:49:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:49:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:49:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:49:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:49:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:49:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:49:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:49:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:49:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:49:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:49:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:49:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:49:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:49:23 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:49:23 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:49:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:49:23 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:49:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:49:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:49:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:49:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:25 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:49:25 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:49:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:49:26 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:49:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:26 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:49:27 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:27 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:49:28 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:49:28 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:49:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:49:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:49:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:49:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:49:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:49:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:49:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:49:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:49:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:49:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:49:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:49:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:49:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:49:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:49:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:49:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:49:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:49:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:49:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:49:34 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:49:34 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:49:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:49:34 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:49:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:49:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:49:36 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:49:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:36 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:49:37 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:49:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:37 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:49:38 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:49:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:38 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:49:38 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:49:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:39 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:49:39 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:49:40 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:49:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:49:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:49:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:49:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:49:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:49:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:49:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:49:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:49:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:49:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:49:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:49:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:49:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:49:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:49:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:49:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:49:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:49:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:49:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:49:46 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:49:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:49:46 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:49:46 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:49:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:49:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:49:47 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:49:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:48 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:49:48 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:49:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:49 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:49:49 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:49:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:50 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:49:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:49:50 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:49:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:51 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:49:51 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:49:51 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:49:52 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:49:52 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:49:53 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:49:53 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:49:54 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:49:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:49:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:49:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:49:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:49:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:49:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:49:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:49:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:49:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:49:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:49:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:49:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:49:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:49:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:49:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:49:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:49:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:49:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:49:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:49:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:49:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:49:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:49:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:49:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:49:59 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:49:59 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:49:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:49:59 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:50:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:50:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:50:01 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:50:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:50:02 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:50:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:02 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:50:03 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:50:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:03 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:50:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:50:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:50:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:50:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:50:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:50:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:50:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:50:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:50:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:50:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:50:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:50:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:50:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:50:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:50:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:50:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:50:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:50:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:50:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:50:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:50:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:50:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:50:09 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:50:09 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:50:09 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:50:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:50:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:50:09 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:50:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:50:09 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:50:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:50:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:50:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:50:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:50:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:50:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:50:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:50:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:50:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:50:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:50:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:50:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:50:15 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:50:15 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:50:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:50:15 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:50:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:50:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:50:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:50:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:50:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:50:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:50:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:50:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:50:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:50:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:50:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:50:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:50:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:50:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:50:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:50:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:50:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:50:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:50:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:50:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:50:20 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:50:20 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:50:20 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:50:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:50:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:50:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:50:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:50:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:50:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:50:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:50:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:50:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:50:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:50:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:50:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:50:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:50:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:50:26 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:50:26 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:50:26 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:50:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:50:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:50:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:50:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:50:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:50:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:50:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:50:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:50:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:50:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:50:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:50:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:50:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:50:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:50:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:50:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:50:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:50:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:50:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:50:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:50:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:50:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:50:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:50:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:50:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:50:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:50:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:50:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:50:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:50:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:50:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:50:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:50:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:50:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:50:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:50:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:50:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:50:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:50:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:50:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:50:35 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:50:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:50:35 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:50:35 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:50:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:50:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:50:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:50:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:50:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:50:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:50:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:50:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:50:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:50:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:50:36 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:50:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:36 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:50:37 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:50:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:37 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:50:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:50:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:50:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:50:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:50:38 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:50:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:38 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:50:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:50:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:50:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:50:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:50:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:50:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:50:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:50:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:50:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:50:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:50:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:50:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:50:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:50:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:50:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:50:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:50:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:50:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:50:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:50:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:50:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:50:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:50:44 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:50:44 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:50:44 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:50:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:50:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:50:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:50:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:50:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:50:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:50:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:50:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:50:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:50:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:50:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:50:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:50:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:50:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:50:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:50:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:50:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:50:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:50:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:50:47 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:50:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:47 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:50:48 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:50:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:48 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:50:49 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:50:49 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:50:50 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:50:50 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:50:51 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:50:51 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:50:52 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:50:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:50:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:50:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:50:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:50:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:50:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:50:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:50:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:50:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:50:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:50:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:50:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:50:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:50:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:50:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:50:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:50:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:50:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:50:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:50:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:50:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:50:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:50:57 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:50:57 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:50:57 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:50:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:50:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:50:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:50:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:50:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:50:59 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:50:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:50:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:50:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:50:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:50:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:51:00 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:51:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:51:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:51:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:51:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:51:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:51:01 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:51:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:01 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:51:02 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:51:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:02 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:51:03 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:51:03 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:51:04 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:51:04 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:51:05 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:51:05 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:51:05 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:51:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:51:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:51:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:51:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:51:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:51:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:51:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:51:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:51:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:51:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:51:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:51:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:51:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:51:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:51:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:51:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:51:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:51:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:51:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:51:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:51:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:51:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:51:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:51:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:51:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:51:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:51:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:51:11 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:51:11 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:51:11 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:51:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:51:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:51:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:51:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:51:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:12 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:51:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:51:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:13 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:51:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:51:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:14 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:51:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:51:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:51:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:51:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:51:14 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:51:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:15 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:51:15 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:51:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:16 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:51:16 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:51:17 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:51:17 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:51:18 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:51:18 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:51:19 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:51:19 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:51:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:51:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:51:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:51:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:51:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:51:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:51:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:51:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:51:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:51:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1861 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:51:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:51:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1861 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:51:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1861 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:51:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1861 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:51:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1861 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:51:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1861 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:51:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1861 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:51:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1861 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:51:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:51:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:51:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:51:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:51:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:51:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:51:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:51:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:51:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:51:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:51:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:51:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:51:25 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:51:25 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:51:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:51:25 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:51:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:51:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:51:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:51:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:51:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:51:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:51:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:51:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:51:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:51:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:51:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:51:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:51:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:51:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:51:26 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:51:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:26 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:51:27 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:51:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:27 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:51:28 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:51:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:28 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:51:29 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:51:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:29 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:51:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:51:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:51:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:51:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:51:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:51:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:51:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:51:30 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1212 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:51:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:51:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:51:30 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1212 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:51:30 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1212 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:51:30 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1212 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:51:30 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1212 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:51:30 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1212 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:51:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:51:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:51:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:51:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:51:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:51:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:51:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:51:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:51:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:51:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:51:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:51:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:51:35 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:51:35 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:51:35 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:51:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:51:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:51:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:51:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:51:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:51:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:51:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:51:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:51:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:51:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:51:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:51:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:51:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:51:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:51:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:51:39 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:51:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:40 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:51:40 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:51:41 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:51:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:51:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:51:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:51:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:51:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:51:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:51:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:51:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:51:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:51:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:51:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:51:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:51:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:51:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:51:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:51:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:51:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:51:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:51:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:51:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:51:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:51:47 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:51:47 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:51:47 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:51:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:51:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:51:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:51:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:51:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:51:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:51:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:51:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:51:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:51:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:51:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:51:48 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:51:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:48 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:51:49 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:51:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:49 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:51:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:51:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:51:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:51:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:51:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:51:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:51:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:51:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=785 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:51:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:51:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:51:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:51:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=785 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:51:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=785 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:51:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=785 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:51:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=785 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:51:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=785 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:51:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:51:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:51:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:51:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:51:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:51:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:51:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:51:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:51:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:51:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:51:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:51:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:51:55 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:51:55 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:51:55 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:51:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:51:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:51:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:51:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:51:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:51:57 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:51:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:57 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:51:58 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:51:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:58 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:51:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:51:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:51:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:51:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:51:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:51:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:51:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:51:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:51:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:51:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:51:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:51:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:51:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:51:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:52:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:52:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:52:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:52:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:52:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:52:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:52:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:52:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:52:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:52:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:52:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:52:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:52:04 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:52:04 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:52:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:52:04 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:52:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:52:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:52:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:52:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:52:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:52:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:52:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:52:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:52:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:52:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:52:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:52:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:52:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:52:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:52:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:52:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:52:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:52:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:52:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:52:04 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:52:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:52:04 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:52:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:52:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:52:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:52:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:52:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:52:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:52:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:52:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:52:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:52:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:52:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:52:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:52:10 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:52:10 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:52:10 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:52:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:52:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:52:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:52:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:52:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:52:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:52:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:52:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:52:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:52:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:52:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:52:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:52:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:52:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:52:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:52:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:52:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:52:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:52:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:52:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=163 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:52:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:52:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:52:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=163 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:52:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:52:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:52:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:52:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:52:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:52:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:52:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:52:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:52:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:52:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:52:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:52:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:52:15 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:52:15 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:52:15 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:52:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:52:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:52:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:52:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:52:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:52:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:52:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:52:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:52:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:52:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:52:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:52:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:52:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:52:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:52:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:52:18 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:52:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:52:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:52:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:52:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:52:18 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:52:19 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:52:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:52:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:52:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:52:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:52:19 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:52:20 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:52:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:52:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:52:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:52:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:52:20 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:52:21 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:52:21 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:52:22 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:52:22 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:52:23 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:52:23 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:52:23 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:52:24 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:52:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:52:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:52:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:52:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:52:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:52:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:52:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:52:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:52:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:52:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:52:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:52:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:52:24 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2021 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:52:24 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2021 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:24 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2021 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:24 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2021 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:24 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2021 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:24 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2021 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:24 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2021 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:52:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:52:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:52:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:52:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:52:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:52:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:52:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:52:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:52:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:52:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:52:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:52:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:52:30 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:52:30 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:52:30 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:52:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:52:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:52:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:52:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:52:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:52:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:52:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:52:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:52:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:52:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:52:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:52:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:52:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:52:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:52:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:52:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:52:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:52:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:52:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:52:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:52:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:52:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:52:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:52:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:52:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:52:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:52:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:52:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:52:34 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:52:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:52:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:52:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:52:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:52:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:52:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:52:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:52:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:52:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:52:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:52:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:52:37 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:52:38 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:52:38 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:52:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:52:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:52:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:52:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:52:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:52:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:52:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:52:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:52:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:52:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:52:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:52:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:52:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2016 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:52:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2016 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2016 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2016 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2016 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2016 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2016 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2016 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:52:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:52:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:52:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:52:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:52:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:52:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:52:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:52:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:52:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:52:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:52:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:52:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:52:44 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:52:44 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:52:44 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:52:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:52:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:52:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:52:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:52:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:52:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:52:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:52:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:52:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:52:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:52:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:52:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:52:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:52:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:52:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:52:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:52:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:52:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:52:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:52:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:52:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:52:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:52:47 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:52:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:52:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:52:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:52:47 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:52:47 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:52:47 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:52:47 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:52:47 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:52:47 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:52:47 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:52:47 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:52:48 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:52:48 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:52:48 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:52:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:52:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:52:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:52:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:52:48 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:52:48 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:52:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:52:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:52:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:52:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:52:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:52:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:52:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:52:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:52:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:52:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:52:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:52:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=893 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:52:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:52:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:52:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=893 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=893 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=893 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:52:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:52:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:52:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:52:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:52:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:52:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:52:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:52:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:52:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:52:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:52:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:52:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:52:53 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:52:53 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:52:53 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:52:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:52:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:52:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:52:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:52:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:52:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:52:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:52:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:52:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:52:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:52:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:52:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:52:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:52:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:52:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:52:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:52:59 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:52:59 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:52:59 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:52:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:52:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:52:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:52:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:52:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:52:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:53:00 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:53:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:53:01 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:53:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:02 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:53:02 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:53:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:03 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:53:03 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:53:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:04 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:53:04 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:53:05 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:53:05 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:53:06 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:53:06 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:53:06 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:53:07 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:53:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:53:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:53:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:53:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:53:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:53:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:53:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:53:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:53:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:53:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:53:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:53:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:53:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:53:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:53:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:53:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:53:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:53:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:53:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:53:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:53:13 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:53:13 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:53:13 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:53:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:53:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:53:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:53:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:14 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:53:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:53:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:15 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:53:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:53:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:16 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:53:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:53:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:17 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:53:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:53:18 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:53:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:53:19 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:53:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:53:20 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:53:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:53:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:53:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:53:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:53:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:53:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:53:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:53:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:53:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:53:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:53:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:53:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:53:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:53:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:53:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:53:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:53:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:53:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:53:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:53:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:53:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:53:26 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:53:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:53:26 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:53:26 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:53:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:53:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:53:28 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:53:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:53:29 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:53:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:53:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:53:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:53:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:53:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:53:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:53:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:53:29 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=777 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:53:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:53:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:53:29 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=777 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:53:29 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=777 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:53:29 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=777 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:53:29 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=777 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:53:29 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=777 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:53:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:53:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:53:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:53:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:53:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:53:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:53:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:53:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:53:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:53:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:53:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:53:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:53:35 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:53:35 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:53:35 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:53:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:53:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:53:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:53:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:53:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:53:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:53:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:53:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:53:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:53:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:53:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:53:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:53:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:53:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:53:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:53:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:53:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:53:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:53:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:53:41 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:53:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:53:41 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:53:41 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:53:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:53:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:53:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:53:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:53:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:53:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:53:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:53:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:53:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:53:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:53:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:53:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:53:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:53:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:53:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:53:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:53:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:53:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:53:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:53:46 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:53:46 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:53:46 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:53:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:53:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:53:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:53:48 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:53:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:48 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:53:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:53:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:53:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:53:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:53:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:53:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:53:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:53:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:53:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:53:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:53:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:53:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:53:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:53:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:53:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:53:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:53:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:53:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:53:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:53:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:53:54 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:53:54 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:53:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:53:54 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:53:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:53:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:53:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:53:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:53:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:53:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:53:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:53:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:53:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:53:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:53:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:53:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:53:56 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:53:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:53:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:53:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:53:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:53:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:53:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:53:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:53:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:53:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:53:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:53:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:53:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:53:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:53:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:53:57 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=720 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:53:57 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=720 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:53:57 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=720 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:53:57 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=720 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:53:57 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=720 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:53:57 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=720 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:54:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:54:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:54:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:54:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:54:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:54:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:54:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:54:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:54:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:54:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:54:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:54:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:54:02 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:54:02 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:54:02 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:54:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:54:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:54:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:54:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:54:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:03 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:54:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:54:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:04 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:54:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:54:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:54:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:54:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:54:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:54:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:54:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:54:04 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=568 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:54:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:54:04 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=568 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:04 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=568 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:04 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=568 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:04 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:04 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:04 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:04 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:54:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:54:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:54:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:54:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:54:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:54:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:54:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:54:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:54:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:54:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:54:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:54:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:54:10 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:54:10 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:54:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:54:10 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:54:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:54:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:54:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:54:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:54:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:54:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:54:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:54:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:54:10 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:54:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:54:11 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:54:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:54:12 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:54:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:13 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:54:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:54:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:54:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:54:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:54:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:54:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:54:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:54:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:54:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:54:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:54:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:54:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:54:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:54:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:54:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:54:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:54:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:54:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:54:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:54:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:54:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:54:18 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:54:18 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:54:18 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:54:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:54:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:54:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:54:19 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:54:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:54:20 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:54:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:54:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:54:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:54:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:54:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:54:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:54:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:54:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:54:20 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=568 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:54:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:54:20 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=568 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:20 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=568 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:20 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=568 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:20 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:20 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:20 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:20 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:54:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:54:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:54:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:54:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:54:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:54:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:54:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:54:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:54:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:54:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:54:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:54:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:54:26 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:54:26 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:54:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:54:26 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:54:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:54:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:54:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:54:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:54:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:54:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:54:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:54:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:54:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:54:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:54:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:54:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:54:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:54:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:54:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:54:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:30 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:54:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:54:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:54:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:54:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:54:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:54:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:54:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:54:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:54:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:54:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:54:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:54:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:54:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:54:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:54:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:54:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:54:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:54:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:54:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:54:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:54:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:54:35 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:54:35 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:54:35 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:54:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:54:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:54:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:54:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:54:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:54:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:54:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:54:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:54:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:54:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:54:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:54:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:54:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:54:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:54:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:54:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:54:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:54:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:54:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:54:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=976 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:54:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:54:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:54:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:54:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:54:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:54:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:54:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:54:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:54:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:54:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:54:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:54:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:54:45 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:54:45 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:54:45 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:54:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:54:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:54:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:54:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:54:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:54:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:54:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:54:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:54:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:54:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:54:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=550 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:54:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=550 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=550 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=550 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=550 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=550 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:54:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:54:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:54:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:54:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:54:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:54:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:54:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:54:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:54:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:54:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:54:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:54:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:54:52 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:54:52 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:54:52 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:54:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:54:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:54:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:54:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:54:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:54:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:55 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:54:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:54:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:54:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:54:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:54:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:54:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:54:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:54:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:54:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:54:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=777 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:54:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:54:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:54:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:55:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:55:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:55:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:55:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:55:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:55:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:55:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:55:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:55:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:55:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:55:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:55:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:55:01 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:55:01 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:55:01 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:55:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:55:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:55:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:55:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:55:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:55:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:55:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:55:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:55:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:55:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:55:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:55:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:55:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:55:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:55:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:55:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:55:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:55:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:55:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:55:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:55:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:55:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:55:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:55:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:55:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:55:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:55:07 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:55:07 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:55:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:55:07 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:55:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:55:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:55:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:55:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:55:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:55:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:55:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:55:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:55:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:55:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:55:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:55:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:55:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:55:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:55:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:55:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:55:09 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:55:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:55:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:55:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:55:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:55:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:55:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:55:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:55:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:55:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:55:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:55:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:55:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:55:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:55:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:55:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:55:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:55:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:55:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:55:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:55:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:55:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:55:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:55:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:55:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:55:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:55:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:55:15 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:55:15 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:55:15 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:55:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:55:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:55:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:55:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:55:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:55:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:55:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:55:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:55:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:55:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:55:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:55:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:55:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:55:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:55:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:55:21 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:55:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:55:21 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:55:21 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:55:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:55:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:55:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:55:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:55:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:55:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:55:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:55:21 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:21 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:21 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:21 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:21 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:21 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:55:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:55:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:55:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:55:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:55:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:55:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:55:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:55:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:55:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:55:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:55:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:55:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:55:26 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:55:26 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:55:26 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:55:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:55:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:55:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:55:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:55:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:55:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:55:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:55:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:55:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:55:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:55:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:55:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:55:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:55:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:55:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:55:32 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:55:32 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:55:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:55:32 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:55:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:55:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:55:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:55:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:55:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:55:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:55:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:55:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:55:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:55:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:55:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:55:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:55:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:55:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:55:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:55:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:55:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:55:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:55:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:55:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:55:38 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:55:38 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:55:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:55:38 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:55:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:55:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:55:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:55:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:55:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:55:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:55:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:55:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:55:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:55:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:55:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:55:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:55:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:55:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:55:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:55:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:55:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:55:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:55:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:55:43 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:55:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:55:43 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:55:43 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:55:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:55:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:55:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:55:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:55:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:55:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:55:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:55:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:55:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:55:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:55:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:55:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:55:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:55:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:55:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:55:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:55:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:55:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:55:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:55:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:55:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:55:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:55:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:55:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:55:46 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:55:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:55:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:55:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:55:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:55:47 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:55:47 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:55:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:55:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:55:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:55:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:55:48 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:55:48 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:55:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:55:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:55:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:55:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:55:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:55:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:55:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:55:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:55:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:55:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:55:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:55:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:55:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:55:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:55:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:55:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:55:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:55:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:55:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:55:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:55:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:55:54 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:55:54 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:55:54 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:55:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:55:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:55:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:55:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:55:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:55:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:55:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:55:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:55:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:55:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:55:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:55:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:55:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:55:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:55:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:55:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:55:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:55:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:55:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:55:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:55:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:55:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:56:00 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:56:00 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:56:00 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:56:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:56:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:56:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:56:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:56:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:56:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:56:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:56:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:56:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:56:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:56:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:56:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:56:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:56:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:56:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:56:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:56:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:56:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:56:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:56:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:56:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:56:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:56:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:56:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:56:05 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:05 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:56:05 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:56:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:56:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:56:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:56:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:56:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:56:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:56:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:56:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:56:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:56:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:56:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:56:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:56:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:56:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:56:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:56:11 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:56:11 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:56:11 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:56:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:56:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:56:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:56:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:56:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:56:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:56:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:56:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:56:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:56:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:56:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:56:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:56:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:56:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:56:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:56:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:56:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:56:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:56:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:56:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:56:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:56:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:56:16 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:56:16 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:16 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:56:16 [DEBUG] fake_trx.py:376 (BTS@172.18.90.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-24 08:56:16 [INFO] fake_trx.py:379 (BTS@172.18.90.20:5700) Artificial TRXC delay set to 200
2024-10-24 08:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-24 08:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:56:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:56:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:56:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:56:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:56:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:18 [DEBUG] fake_trx.py:376 (BTS@172.18.90.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-24 08:56:18 [INFO] fake_trx.py:379 (BTS@172.18.90.20:5700) Artificial TRXC delay set to 0
2024-10-24 08:56:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-24 08:56:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:56:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:56:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:56:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:56:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:56:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:56:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:56:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:56:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:56:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:56:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:56:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:56:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:56:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:56:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:56:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:56:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:56:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:56:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:56:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:56:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:56:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:56:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:56:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:56:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:56:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:56:24 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:56:24 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:56:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:24 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:56:24 [DEBUG] fake_trx.py:376 (BTS@172.18.90.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-24 08:56:24 [INFO] fake_trx.py:379 (BTS@172.18.90.20:5700) Artificial TRXC delay set to 200
2024-10-24 08:56:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-24 08:56:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:24 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:56:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:56:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:56:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:56:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:25 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:25 [DEBUG] fake_trx.py:376 (BTS@172.18.90.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-24 08:56:25 [INFO] fake_trx.py:379 (BTS@172.18.90.20:5700) Artificial TRXC delay set to 0
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:56:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:56:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:56:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:56:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:56:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:56:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:56:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:56:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:56:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:56:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:56:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:56:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:56:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:56:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:56:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:56:31 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:56:31 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:31 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:56:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:56:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:56:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:56:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:56:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:56:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:56:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:56:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:56:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:56:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:56:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:56:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:56:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:56:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:56:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:56:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:56:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:56:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:56:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:56:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:56:36 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:56:36 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:36 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:56:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:56:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:56:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:56:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:56:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:56:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:56:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:56:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:56:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:56:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:56:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:56:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:56:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:56:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:56:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:56:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:56:42 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:56:42 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:56:42 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:56:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:56:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:42 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:56:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:56:43 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:56:43 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:56:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:56:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:56:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:56:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:56:44 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:56:44 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:56:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:56:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:56:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:56:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:56:45 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:56:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:45 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:56:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:56:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:56:46 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:56:46 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:56:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:56:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:56:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:56:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:56:47 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:56:47 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:56:48 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:56:48 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:56:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:56:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:49 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:56:49 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:56:49 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:56:50 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:56:50 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:56:51 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:51 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:56:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:56:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:52 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:56:52 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:56:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:56:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:56:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:56:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:56:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:56:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:56:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:53 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:56:53 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:56:54 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:56:54 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:56:55 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:56:55 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:56:56 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:56:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:56:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:56 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:56:56 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:56:57 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:56:57 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:56:58 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:56:58 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 08:56:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:56:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:56:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:56:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:56:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:56:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:56:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:56:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:56:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:59 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 08:56:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:56:59 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 08:57:00 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 08:57:00 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 08:57:01 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 08:57:01 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 08:57:02 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:02 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 08:57:03 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 08:57:03 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 08:57:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:04 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 08:57:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:04 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 08:57:04 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 08:57:05 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 08:57:05 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 08:57:06 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 08:57:06 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:07 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:07 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 08:57:08 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 08:57:08 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 08:57:09 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 08:57:09 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 08:57:10 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 08:57:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:10 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 08:57:11 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 08:57:11 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 08:57:11 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 08:57:12 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 08:57:12 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 08:57:13 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:13 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 08:57:14 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:14 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 08:57:15 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 08:57:15 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 08:57:16 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 08:57:16 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 08:57:17 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:17 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:18 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 08:57:18 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-24 08:57:19 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-24 08:57:19 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-24 08:57:19 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-24 08:57:20 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-24 08:57:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:20 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-24 08:57:21 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-24 08:57:21 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-24 08:57:22 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-24 08:57:22 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-24 08:57:23 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-24 08:57:23 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-24 08:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:24 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:57:24 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:57:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:57:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:57:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:57:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:57:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:57:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:57:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:57:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:57:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:57:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:57:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:57:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:57:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:57:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:57:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:57:30 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:30 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:57:30 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:57:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:57:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:57:30 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=225 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:57:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:57:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:57:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:57:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:57:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:57:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:57:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:57:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:57:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:57:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:57:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:57:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:57:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:57:36 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:36 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:57:36 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:57:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:57:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:57:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:57:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:57:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:57:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:57:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:57:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:57:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:57:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:57:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:57:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:57:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:57:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:57:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=496 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:57:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=496 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:57:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=496 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:57:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=496 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:57:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=496 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:57:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=496 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:57:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=496 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:57:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=496 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:57:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:57:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:57:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:57:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:57:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:57:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:57:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:57:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:57:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:57:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:57:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:57:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:57:43 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:57:43 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:43 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:57:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:57:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:57:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:57:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:57:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:57:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:57:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:57:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:57:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:57:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:57:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:57:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:57:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:57:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:57:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:57:50 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:57:50 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:50 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:57:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:57:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:57:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=394 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:57:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:57:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=394 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:57:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=394 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:57:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=394 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:57:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=394 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:57:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=394 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:57:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=394 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:57:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=394 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:57:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:57:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:57:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:57:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:57:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:57:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:57:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:57:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:57:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:57:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:57:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:57:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:57:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:57:57 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:57:57 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:57:57 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:57:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:57:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:57:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:57:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:57:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:57:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:57:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:57:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:57:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:57:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:57:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:57:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:57:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:57:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:57:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:57:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:57:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:57:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:57:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:57:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:57:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:58:00 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:58:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:58:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:58:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:58:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:01 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:58:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:01 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:58:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:58:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:58:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:58:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:01 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:58:02 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:58:02 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:58:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:02 [WARNING] transceiver.py:250 (MS@172.18.90.22:6700) RX TRXD message (fn=1336 tn=7 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:58:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:03 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:58:03 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:58:04 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:58:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:58:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:58:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:58:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:04 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:58:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:58:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:58:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:58:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:58:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:58:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:58:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:58:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:58:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:58:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:58:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:58:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:58:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:58:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:58:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:58:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:58:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:58:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:58:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:58:10 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:58:10 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:58:10 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:58:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:10 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:58:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:58:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:58:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:58:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:58:11 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:58:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:58:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:58:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:58:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:58:12 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:58:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:58:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:58:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:13 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:58:13 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:58:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:58:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:58:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:58:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:14 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:58:14 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:58:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:58:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:58:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:58:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:14 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:58:15 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:58:15 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:58:16 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:58:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:16 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:58:17 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:58:17 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:58:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:58:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:58:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:58:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:18 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:58:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:58:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:58:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:58:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:58:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:58:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:58:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:58:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:58:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:58:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:58:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:58:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:58:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:58:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:58:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:58:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:58:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:58:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:58:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:58:23 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:58:23 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:23 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:24 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:58:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:58:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:58:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:58:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:58:25 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:58:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:58:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:58:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:58:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:25 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:58:26 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:26 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:58:27 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:58:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:58:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:58:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:58:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:27 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:58:28 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:28 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:28 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:58:29 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:58:29 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:58:30 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:58:30 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:31 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:31 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 08:58:32 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 08:58:32 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 08:58:33 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 08:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:33 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 08:58:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:34 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 08:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:34 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 08:58:35 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 08:58:35 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 08:58:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:35 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 08:58:36 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 08:58:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:36 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 08:58:37 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 08:58:37 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:38 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 08:58:38 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:39 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 08:58:39 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 08:58:40 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 08:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:40 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 08:58:41 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 08:58:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:41 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 08:58:42 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 08:58:42 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 08:58:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:58:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:58:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:58:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:58:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:58:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:58:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:58:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:58:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:58:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:58:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:58:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:58:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:58:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:58:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:58:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:58:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:58:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:58:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:58:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:58:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:58:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:58:48 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:48 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:58:48 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:58:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:58:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:58:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=429 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:58:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:58:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=429 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:58:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:58:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:58:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:58:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:58:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:58:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:58:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:58:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:58:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:58:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:58:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:58:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:58:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:58:55 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:58:55 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:58:55 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:58:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:58:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:58:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:58:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:58:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:57 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:57 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:58:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:58 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:58:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:58 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:58:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:58:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:58:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:58:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:58:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:58:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:58:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:58:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:58:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:58:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:58:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:58:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:58:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:58:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:58:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:59:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:59:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:59:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:59:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:59:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:59:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:59:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:59:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:59:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:59:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:59:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:59:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:59:04 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:59:04 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:04 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:59:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:59:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:59:05 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=394 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:05 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=394 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:59:05 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=394 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:59:05 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=394 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:59:05 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=394 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:59:05 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=394 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:59:05 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=394 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:59:05 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=394 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:59:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:59:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:59:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:59:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:59:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:59:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:59:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:59:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:59:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:59:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:59:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:59:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:59:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:59:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:59:11 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:59:11 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:11 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:59:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:59:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:59:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:59:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:59:12 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:59:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:59:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:59:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:59:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:59:13 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:59:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:59:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:59:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:59:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:59:14 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:14 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 08:59:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:59:15 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 08:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:15 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 08:59:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:59:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:59:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:59:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:59:16 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 08:59:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:16 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 08:59:17 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 08:59:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:17 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 08:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:18 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 08:59:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:18 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 08:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:59:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:59:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:59:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:59:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:59:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:59:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:59:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1736 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:59:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1736 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:59:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1736 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:59:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1736 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:59:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1736 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:59:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1736 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:59:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1736 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:59:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1736 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:59:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:59:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:59:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:59:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:59:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:59:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:59:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:59:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:59:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:59:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:59:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:59:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:59:24 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:59:24 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:24 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:24 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:59:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:59:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:59:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:59:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:59:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:59:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:59:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:59:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:59:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:59:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:59:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:59:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:59:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:59:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:59:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:59:30 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:59:30 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:30 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:59:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:59:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:59:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:59:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:59:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:59:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:59:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:59:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:59:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:59:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:59:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:59:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:59:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:59:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:59:37 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:59:37 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:59:37 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:59:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:59:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:59:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:59:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:59:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:59:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:59:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:59:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:59:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:59:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:59:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:59:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:59:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:59:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:59:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:59:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:59:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:59:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:59:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:59:43 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:59:43 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:59:43 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:59:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:59:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:59:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:59:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:59:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:59:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:59:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:59:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:59:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:59:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:59:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:59:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:59:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:59:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:59:50 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:59:50 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:59:50 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:59:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 08:59:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:59:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:59:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:59:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:59:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 08:59:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 08:59:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:59:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:59:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:59:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:59:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 08:59:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:59:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:59:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:59:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:59:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:59:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:59:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 08:59:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 08:59:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:59:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 08:59:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:59:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 08:59:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:59:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 08:59:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:59:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 08:59:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 08:59:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 08:59:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 08:59:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 08:59:58 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 08:59:58 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:58 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 08:59:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 08:59:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 08:59:59 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 08:59:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:00 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:00:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:00:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:00:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:00:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:00:00 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:00:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:01 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:00:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:00:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:00:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:00:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:00:01 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:00:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:00:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:00:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:00:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:00:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:00:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:00:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:00:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:00:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:00:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:00:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:00:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=786 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:00:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=786 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:00:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:00:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:00:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:00:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:00:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:00:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:00:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:00:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:00:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:00:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:00:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:00:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:00:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:00:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:00:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:00:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:00:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:00:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:00:07 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:00:07 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:07 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:00:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:00:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:00:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:00:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:00:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:00:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:00:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:00:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:00:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:09 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:00:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:00:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:00:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:00:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:00:10 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:00:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:00:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:00:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:00:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:00:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:00:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:00:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:00:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:00:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:00:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:00:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:00:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:00:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:00:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:00:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:00:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:00:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:00:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:00:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:00:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:00:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:00:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:00:16 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:16 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:00:16 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:00:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:00:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:00:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:00:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:00:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:00:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:00:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:18 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:00:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:00:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:00:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:00:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:00:18 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:00:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:00:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:00:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:00:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:00:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:00:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:00:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:00:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:00:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:00:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:00:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:00:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:00:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:00:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:00:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:00:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:00:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:00:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:00:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:00:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:00:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:00:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:00:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:00:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:00:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:00:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:00:24 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:24 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:00:24 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:00:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:00:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:00:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:00:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:00:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:00:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:00:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:00:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:00:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:00:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:00:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:00:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:00:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:00:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:00:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:00:30 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:00:30 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:00:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:30 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:00:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:00:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:00:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:00:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:00:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:00:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:00:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:00:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:00:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:00:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:00:30 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:00:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:00:30 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:00:30 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:00:30 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:00:30 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:00:30 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:00:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:00:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:00:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:00:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:00:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:00:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:00:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:00:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:00:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:00:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:00:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:00:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:00:35 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:00:35 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:35 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:00:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:00:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:00:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:00:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:00:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:00:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:00:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:00:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:00:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:00:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:00:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:00:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:00:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:00:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:00:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:00:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:00:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:00:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:00:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:00:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:00:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:00:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:00:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:00:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:00:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:00:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:00:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:00:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:00:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:00:46 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:00:46 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:46 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:00:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:00:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:00:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:00:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:00:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:47 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:00:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:00:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:00:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:00:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:00:48 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:00:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:48 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:00:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:00:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:00:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:00:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:00:49 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:49 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:00:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:00:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:00:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:00:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:00:50 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:50 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:51 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:51 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:00:52 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:52 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:53 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:00:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:00:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:53 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:00:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:54 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:54 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:54 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:00:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:55 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:00:55 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:00:56 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:00:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:56 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:00:57 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:00:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:57 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:00:58 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:58 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:00:59 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:00:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:00:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:00:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:00:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:00:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:00:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:00:59 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:01:00 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:01:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:01:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:01:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:01:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:01:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:01:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:01:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:01:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:01:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:01:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:01:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:01:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:01:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:01:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:00 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:01:01 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:01:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:01:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:01:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:01:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:01:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:01:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:01:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:01:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:01:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:01:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:01:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:01:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:01:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:01:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:01 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:01:02 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:01:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:01:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:01:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:01:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:01:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:01:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:01:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:01:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:01:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:01:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:01:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:01:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:01:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:01:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:02 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:01:02 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:01:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:01:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:01:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:01:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:01:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:01:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:01:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:01:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:01:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:01:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:01:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:01:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:01:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:01:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3705 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:01:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:01:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3705 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:01:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3705 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:01:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:01:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:01:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:01:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:01:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:01:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:01:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:01:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:01:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:01:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:01:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:01:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:01:08 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:01:08 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:01:08 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:01:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:01:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:01:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:01:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:01:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:01:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:01:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:01:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:01:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:01:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:01:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:09 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:01:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:01:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:01:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:01:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:01:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:01:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:01:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:01:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:01:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:01:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:01:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:01:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:01:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:01:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:01:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:01:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:01:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:01:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:01:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:01:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:01:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:01:18 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:01:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:01:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:01:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:01:19 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:01:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:01:20 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:01:21 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:01:21 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:01:22 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:01:22 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:01:23 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:01:23 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:01:24 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:01:24 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:01:25 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:01:25 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:01:26 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:01:26 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:01:26 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:01:27 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:01:27 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:01:28 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:01:28 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:01:29 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:01:29 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:01:30 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:01:30 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:01:31 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:01:31 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:01:32 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:01:32 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:01:33 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:01:33 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:01:34 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:01:34 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:01:34 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:01:35 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:01:35 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:01:36 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 09:01:36 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 09:01:37 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 09:01:37 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 09:01:38 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 09:01:38 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 09:01:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:01:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:01:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:01:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:01:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:01:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:01:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:01:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5218 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:01:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5218 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:01:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5218 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:01:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5218 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:01:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5218 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:01:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5218 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:01:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5218 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:01:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5218 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:01:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:01:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:01:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:01:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:01:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:01:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:01:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:01:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:01:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:01:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:01:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:01:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:01:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:01:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:01:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:01:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:01:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:01:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:01:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:01:47 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:01:48 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:01:48 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:01:48 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:01:49 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:01:49 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:01:50 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:01:50 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:01:51 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:01:51 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:01:52 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:01:52 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:01:53 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:01:53 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:01:54 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:01:54 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:01:55 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:01:55 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:01:56 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:01:56 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:01:56 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:01:57 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:01:57 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:01:58 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:01:58 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:01:59 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:01:59 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:02:00 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:02:00 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:02:01 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:02:01 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:02:02 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:02:02 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:02:03 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:02:03 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:02:04 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:02:04 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:02:04 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:02:05 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 09:02:05 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 09:02:06 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 09:02:06 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 09:02:07 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 09:02:07 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 09:02:08 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 09:02:08 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 09:02:09 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 09:02:09 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 09:02:10 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 09:02:10 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 09:02:11 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 09:02:11 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 09:02:11 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 09:02:12 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 09:02:12 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 09:02:13 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 09:02:13 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 09:02:14 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 09:02:14 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 09:02:15 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 09:02:15 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 09:02:16 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 09:02:16 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 09:02:17 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 09:02:17 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 09:02:18 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 09:02:18 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 09:02:19 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 09:02:19 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 09:02:19 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 09:02:20 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-24 09:02:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:02:20 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-24 09:02:21 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-24 09:02:21 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-24 09:02:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:02:22 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-24 09:02:22 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-24 09:02:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:02:23 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-24 09:02:23 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-24 09:02:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:02:24 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-24 09:02:24 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-24 09:02:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:02:25 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-24 09:02:25 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-24 09:02:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:02:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:02:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:02:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:02:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:02:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:02:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:02:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:02:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=9142 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:02:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=9142 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:02:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=9142 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:02:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=9142 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:02:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=9142 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:02:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=9142 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:02:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=9142 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:02:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=9142 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:02:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:02:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:02:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:02:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:02:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:02:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:02:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:02:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:02:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:02:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:02:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:02:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:02:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:02:31 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:02:31 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:02:31 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:02:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:02:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:02:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:02:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:02:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:02:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:02:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:02:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:02:31 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:02:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:02:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:02:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:02:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:02:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:02:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:02:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:02:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:02:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:02:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:02:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:02:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:02:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:02:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:02:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:02:33 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:02:33 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:02:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:02:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:02:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:02:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:02:34 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:02:34 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:02:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:02:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:02:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:02:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:02:35 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:02:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:02:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:02:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:02:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:02:35 [WARNING] transceiver.py:250 (MS@172.18.90.22:6700) RX TRXD message (fn=936 tn=4 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:02:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:02:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:02:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:02:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:02:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:02:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:02:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:02:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:02:35 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:02:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:02:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:02:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:02:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:02:35 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:02:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:02:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:02:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:02:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:02:36 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:02:36 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:02:37 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:02:37 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:02:37 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:02:38 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:02:38 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:02:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:02:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:02:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:02:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:02:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:02:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:02:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:02:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:02:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:02:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:02:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:02:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:02:39 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:02:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:02:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:02:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:02:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:02:39 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:02:39 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:02:40 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:02:40 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:02:41 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:02:41 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:02:42 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:02:42 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:02:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:02:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:02:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:02:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:02:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:02:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:02:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:02:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:02:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:02:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:02:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:02:43 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:43 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:02:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:02:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:02:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:02:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:02:43 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:02:44 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:02:44 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:02:44 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:02:45 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:02:45 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:02:46 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:02:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:02:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:02:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:02:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:02:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:02:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:02:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:02:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:02:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:02:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:02:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:02:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:02:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:02:46 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3454 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:02:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:02:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:02:46 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3454 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:02:46 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3454 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:02:46 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3455 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:02:46 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3455 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:02:46 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3455 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:02:46 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3455 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:02:46 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3455 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:02:46 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3455 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:02:46 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3455 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:02:46 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3455 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:02:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:02:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:02:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:02:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:02:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:02:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:02:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:02:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:02:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:02:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:02:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:02:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:02:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:02:52 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:02:52 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:02:52 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:02:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:02:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:02:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:02:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:02:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:02:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:02:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:02:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:02:52 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:02:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:02:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:02:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:02:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:02:52 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:02:52 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:02:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:02:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:02:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:02:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:02:53 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:53 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:02:53 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:02:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:02:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:02:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:02:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:02:54 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:54 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:02:54 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:02:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:02:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:02:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:02:55 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:02:55 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:55 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:02:55 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:02:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:02:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:02:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:02:56 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:02:56 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:56 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:02:56 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:02:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:02:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:02:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:02:57 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:02:57 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:57 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:02:57 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:57 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:02:58 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:58 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:02:58 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:58 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:02:59 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:59 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:02:59 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:59 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:02:59 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:02:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:02:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:02:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:02:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:02:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:02:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:02:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:02:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:02:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:02:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:02:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:02:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:03:00 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:03:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:03:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:00 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:03:00 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:00 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:03:01 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:01 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:03:01 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:01 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:03:02 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:02 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:03:02 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:02 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:03:03 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:03 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:03:03 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:03 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:03:04 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:04 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:03:04 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:04 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:03:04 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:03:04 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:05 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:03:05 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:05 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:03:05 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:06 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:03:06 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:06 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:03:06 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:07 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:03:07 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:07 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:03:07 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:03:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:03:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:03:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:03:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:03:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:03:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:03:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:03:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:03:07 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:03:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:03:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:08 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:08 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:03:08 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:08 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:03:09 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:09 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:03:09 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:09 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:03:10 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:10 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:03:10 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:10 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:03:11 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:11 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:03:11 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:11 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:03:11 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:12 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:03:12 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:12 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:03:12 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:12 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:03:13 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:13 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 09:03:13 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:13 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 09:03:14 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:14 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 09:03:14 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:14 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 09:03:15 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:03:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:03:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:03:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:03:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:03:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:03:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:03:15 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:15 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 09:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:03:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:15 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:15 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 09:03:16 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:16 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 09:03:16 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:16 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 09:03:17 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:17 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 09:03:17 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:17 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 09:03:18 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:18 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 09:03:18 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:18 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 09:03:18 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:19 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 09:03:19 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:19 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 09:03:19 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:19 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 09:03:20 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:20 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 09:03:20 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:20 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 09:03:21 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:21 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 09:03:21 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:21 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 09:03:22 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:22 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 09:03:22 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:03:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:03:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:03:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:03:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:03:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:03:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:03:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:03:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:03:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:03:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:03:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:03:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:03:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:03:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:03:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:03:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:03:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:03:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:03:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:03:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:03:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:03:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:03:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:03:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:03:28 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:03:28 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:28 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:03:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:03:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:03:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:03:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:03:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:03:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:03:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:03:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:03:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:03:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:03:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:03:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:03:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:03:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:03:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:03:29 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:03:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:03:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:03:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:03:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:03:30 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:03:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:03:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:03:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:03:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:03:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:03:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:03:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:30 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:03:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:03:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:03:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:03:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:03:31 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:03:31 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:03:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:03:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:03:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:03:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:03:32 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:03:32 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:03:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:03:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:03:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:03:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:03:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:03:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:03:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:03:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:03:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:03:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:03:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:03:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:03:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:03:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:03:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:03:32 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:03:33 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:03:33 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:03:34 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:03:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:03:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:03:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:03:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:03:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:03:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:03:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:03:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:03:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:03:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:03:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:03:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:03:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:03:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:03:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:03:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:03:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:03:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:03:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:03:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:03:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:03:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:03:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:03:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:03:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:03:40 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:40 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:40 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:03:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:03:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:03:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:03:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:03:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:03:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:03:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:03:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:03:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:03:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:03:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:03:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:03:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:03:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:03:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:03:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:03:42 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:03:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:03:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:03:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:03:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:03:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:03:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:03:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:03:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:03:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:42 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:03:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:03:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:03:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:03:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:03:43 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:03:43 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:03:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:03:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:03:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:03:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:03:44 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:03:44 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:03:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:03:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:03:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:03:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:03:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:03:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:03:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:03:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:03:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:03:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:03:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:03:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:03:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:03:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:03:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:03:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:03:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:03:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:03:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:03:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:03:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:03:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:03:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:03:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:03:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:03:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:03:50 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:03:50 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:03:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:50 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:03:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:03:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:03:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:03:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:03:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:03:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:03:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:03:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:03:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:03:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:03:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:03:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:03:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:03:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:03:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:03:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:03:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:03:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:03:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:03:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:03:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:03:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:03:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:03:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:03:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:03:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:03:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:03:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:03:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:03:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:03:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:03:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:03:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:03:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:03:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:03:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:03:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:03:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:03:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:03:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:03:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:03:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:03:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:03:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:03:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:03:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:03:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:03:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:03:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:03:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:03:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:03:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:03:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:03:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:03:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:03:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:03:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:03:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:03:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:03:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:03:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:03:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:03:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:03:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:03:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:03:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:03:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:03:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:03:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:03:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:03:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:03:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:03:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:03:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:03:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:03:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:03:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:03:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:03:56 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1496 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:03:56 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1496 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:03:56 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1496 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:03:56 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1496 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:03:56 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1496 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:04:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:04:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:04:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:04:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:04:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:04:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:04:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:04:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:04:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:04:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:04:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:04:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:04:02 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:02 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:04:02 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:04:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:04:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:04:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:04:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:04:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:04:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:04:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:04:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:04:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:04:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:04:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:04:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:04 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:04:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:04:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:04:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:04:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:04:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:04:05 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:04:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:04:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:04:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:04:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:04:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:04:06 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:04:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:04:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:04:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:04:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:04:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:04:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:04:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:04:06 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1053 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:06 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1053 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:06 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1053 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:06 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1053 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:06 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1053 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:06 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1053 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:06 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1053 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:06 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1053 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:04:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:04:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:04:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:04:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:04:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:04:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:04:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:04:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:04:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:04:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:04:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:04:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:04:11 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:04:11 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:04:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:11 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:04:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:04:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:04:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:04:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:12 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:04:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:04:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:04:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:04:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:04:12 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:04:13 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:04:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:04:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:04:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:04:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:04:13 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:04:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:04:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:04:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:04:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:04:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:04:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:04:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:04:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:04:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:04:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:04:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:04:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:04:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:04:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:04:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:04:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:04:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:04:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:04:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:04:19 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:04:19 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:04:19 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:19 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:04:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:04:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:04:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:04:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:04:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:04:20 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:04:21 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:04:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:04:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:04:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:04:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:04:21 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:04:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:04:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:04:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:04:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:04:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:04:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:04:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:04:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:04:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:04:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:04:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:04:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:04:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:04:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:04:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:04:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:04:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:04:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:04:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:04:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:04:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:04:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:04:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:04:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:04:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:04:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:04:27 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:04:27 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:04:27 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:04:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:04:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:04:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:04:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:04:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:04:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:04:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:04:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:04:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:04:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:04:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:04:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:04:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:04:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:04:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:04:33 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:04:33 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:04:33 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:04:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:04:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:04:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:04:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:04:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:04:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:04:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:04:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:04:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:04:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=310 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:04:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:04:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:04:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:04:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:04:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:04:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:04:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:04:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:04:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:04:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:04:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:04:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:04:39 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:04:39 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:39 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:04:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:04:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:04:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:04:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:04:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:04:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:04:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:04:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:04:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:04:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:04:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:04:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:04:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:04:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:04:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:04:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:04:46 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:46 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:04:46 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:04:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:04:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:04:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:04:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:04:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:04:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:04:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:04:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:04:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:04:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=368 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=368 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=368 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=369 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=369 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=369 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=369 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=369 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=369 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=369 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=369 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:04:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:04:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:04:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:04:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:04:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:04:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:04:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:04:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:04:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:04:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:04:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:04:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:04:52 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:04:52 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:52 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:04:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:04:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:04:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:04:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:04:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:04:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:04:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:04:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:04:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:04:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:04:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:04:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:04:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:04:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:04:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:04:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:04:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:04:59 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:04:59 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:04:59 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:04:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:04:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:04:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:04:59 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:05:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:05:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:05:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:05:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:05:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:05:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:05:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:05:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:05:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:05:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:05:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:05:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:05:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:05:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:05:00 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=369 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:05:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:05:00 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=369 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:05:00 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=369 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:05:00 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=369 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:05:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:05:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:05:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:05:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:05:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:05:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:05:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:05:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:05:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:05:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:05:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:05:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:05:05 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:05:05 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:05:05 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:05:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:05:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:05:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:05:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:05:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:05:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:05:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:05:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:05:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:05:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:05:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:05:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:05:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:05:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:05:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:05:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:05:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:05:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:05:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:05:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:05:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:05:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:05:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:05:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:05:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:05:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:05:07 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 09:05:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:05:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 09:05:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:05:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:05:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:05:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:05:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:05:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:05:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:05:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:05:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:05:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:05:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:05:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:05:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:05:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=624 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:05:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=624 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:05:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=624 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:05:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=624 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:05:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=624 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:05:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=624 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:05:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=624 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:05:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=624 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:05:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:05:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:05:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:05:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:05:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:05:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:05:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:05:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:05:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:05:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:05:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:05:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:05:13 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:05:13 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:05:13 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:05:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:05:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:05:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:05:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:05:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:05:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:05:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:05:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:05:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:05:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:05:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:05:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:05:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:05:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:05:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:05:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:05:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:05:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:05:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:05:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:05:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:05:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:05:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:05:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:05:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:05:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:05:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:05:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:05:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:05:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:05:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:05:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:05:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:05:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:05:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:05:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:05:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:05:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:05:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:05:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:05:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 09:05:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:05:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:05:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:05:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:05:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:05:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:05:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:05:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:05:22 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:05:22 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:05:22 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:05:23 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:05:23 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:05:24 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:05:24 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:05:25 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:05:25 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:05:26 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:05:26 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:05:27 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:05:27 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:05:28 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:05:28 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:05:29 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:05:29 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:05:30 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:05:30 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:05:30 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:05:31 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:05:31 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:05:32 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:05:32 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:05:33 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:05:33 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 09:05:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:05:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:05:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:05:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:05:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:05:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:05:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:05:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:05:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:05:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:05:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:05:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:05:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:05:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:05:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:05:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:05:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:05:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:05:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:05:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:05:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:05:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:05:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:05:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:05:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:05:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:05:39 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:05:39 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:05:39 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:05:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:05:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:05:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:05:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:05:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:05:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:05:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:05:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:05:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:05:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:05:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:05:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:05:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:05:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:05:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:05:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:05:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:05:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:05:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:05:42 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:05:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:05:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:05:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:05:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:05:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:05:43 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:05:43 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:05:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:05:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:05:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:05:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:05:44 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:05:44 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:05:45 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:05:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:05:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:05:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:05:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:05:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:05:45 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 09:05:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:05:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:05:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:05:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:05:46 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:05:46 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:05:47 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:05:47 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:05:48 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:05:48 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:05:49 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:05:49 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:05:49 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:05:50 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:05:50 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:05:51 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:05:51 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:05:52 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:05:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 09:05:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:05:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:05:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:05:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:05:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:05:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:05:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:05:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:05:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:05:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:05:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:05:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:05:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:05:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:05:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:05:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:05:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:05:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:05:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:05:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:05:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:05:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:05:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:05:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:05:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:05:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:05:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:05:58 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:05:58 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:05:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:05:58 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:05:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:05:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:05:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:05:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:05:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:05:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:05:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:05:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:05:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:05:59 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:05:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:05:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:05:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:05:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:05:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:06:00 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:06:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:06:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:06:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:06:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:06:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:06:01 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:06:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:06:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:06:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:06:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:06:01 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:06:02 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:06:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:06:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:06:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:06:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:06:02 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:06:03 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:06:03 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:06:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:06:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:06:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:06:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:06:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:06:04 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 09:06:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:06:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:06:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:06:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:06:04 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:06:05 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:06:05 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:06:05 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:06:06 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:06:06 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:06:07 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:06:07 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:06:08 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:06:08 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:06:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 09:06:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:06:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:06:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:06:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:06:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:06:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:06:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:06:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:06:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:06:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:06:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:06:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:06:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:06:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:06:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2485 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:06:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2485 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:06:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2485 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:06:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2485 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:06:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2485 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:06:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2485 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:06:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2485 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:06:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2485 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:06:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:06:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:06:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:06:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:06:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:06:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:06:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:06:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:06:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:06:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:06:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:06:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:06:14 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:06:14 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:06:14 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:06:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:06:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:06:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:06:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:06:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:06:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:06:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:06:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:06:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:06:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:06:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:06:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:06:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:06:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:06:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:06:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:06:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:06:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:06:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:06:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:06:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:06:17 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:06:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:06:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:06:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:06:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:06:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:06:18 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:06:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:06:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:06:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:06:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:06:19 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:06:19 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:06:20 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:06:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:06:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:06:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:06:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:06:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:06:20 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:06:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 09:06:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:06:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:06:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:06:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:06:21 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:06:21 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:06:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:06:22 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:06:22 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:06:23 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:06:23 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:06:24 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:06:24 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:06:25 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 09:06:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:06:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:06:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:06:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:06:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:06:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:06:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:06:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:06:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:06:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:06:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:06:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:06:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:06:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:06:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2485 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:06:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2485 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:06:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2485 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:06:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2485 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:06:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2485 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:06:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2485 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:06:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:06:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:06:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:06:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:06:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:06:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:06:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:06:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:06:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:06:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:06:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:06:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:06:30 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:06:30 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:06:30 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:06:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:06:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:06:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:06:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:06:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:06:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:06:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:06:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:06:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:06:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:06:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:06:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:06:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:06:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:06:33 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:06:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:06:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:06:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:06:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:06:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:06:34 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:06:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:06:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:06:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:06:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:06:34 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:06:35 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:06:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:06:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:06:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:06:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:06:35 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:06:36 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:06:36 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:06:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:06:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:06:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:06:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:06:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:06:37 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 09:06:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:06:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:06:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:06:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:06:37 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:06:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:06:38 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:06:38 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:06:39 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:06:39 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:06:40 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:06:40 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:06:41 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:06:41 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:06:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 09:06:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:06:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:06:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:06:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:06:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:06:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:06:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:06:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:06:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:06:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:06:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:06:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:06:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:06:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:06:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:06:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:06:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:06:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:06:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:06:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:06:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:06:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:06:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:06:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:06:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:06:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:06:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:06:47 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:06:47 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:06:47 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:06:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:06:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:06:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:06:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:06:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:06:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:06:48 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:06:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:06:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:06:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:06:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:06:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:06:49 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:06:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:06:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:06:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:06:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:06:50 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:06:50 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:06:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:06:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:06:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:06:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:06:51 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:06:51 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:06:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:06:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:06:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:06:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:06:52 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:06:52 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:06:53 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:06:53 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:06:53 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:06:54 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:06:54 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:06:55 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:06:55 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:06:56 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:06:56 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:06:57 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:06:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:06:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:06:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:06:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:06:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:06:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:06:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:06:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:06:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:06:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:06:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:07:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:07:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:07:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:07:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:07:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:07:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:07:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:07:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:07:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:07:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:07:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:07:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:07:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:07:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:07:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:07:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:07:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:07:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:07:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:07:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:07:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:07:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:07:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:07:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:07:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:07:08 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:07:08 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:07:08 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:07:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:07:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:07:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:07:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:07:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:07:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:07:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:07:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:07:08 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:07:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:07:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:07:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:07:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:07:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:07:09 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:07:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:07:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:07:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:07:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:07:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:07:10 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:07:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:07:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:07:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:07:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:07:10 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:07:11 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:07:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:07:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:07:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:07:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:07:11 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:07:12 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:07:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:07:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:07:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:07:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:07:12 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:07:13 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:07:13 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:07:14 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:07:14 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:07:15 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:07:15 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:07:16 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:07:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:07:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:07:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:07:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:07:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:07:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:07:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:07:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:07:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:07:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:07:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:07:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:07:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:07:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:07:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:07:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:07:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:07:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:07:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:07:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:07:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:07:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:07:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:07:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:07:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:07:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:07:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:07:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:07:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:07:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:07:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:07:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:07:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:07:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:07:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:07:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:07:26 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:07:26 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:07:26 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:07:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:07:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:07:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:07:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:07:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:07:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:07:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:07:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:07:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:07:28 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:07:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:07:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:07:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:07:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:07:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:07:29 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:07:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:07:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:07:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:07:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:07:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:07:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:07:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:07:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:07:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:07:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:07:30 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:07:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:07:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:07:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:07:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:07:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:07:31 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:07:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:07:32 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:07:32 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:07:33 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:07:33 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:07:34 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:07:34 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:07:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:07:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:07:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:07:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:07:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:07:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:07:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:07:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:07:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:07:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:07:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:07:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:07:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:07:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:07:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:07:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:07:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:07:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:07:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:07:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:07:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:07:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:07:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:07:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:07:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:07:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:07:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:07:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:07:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:07:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:07:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:07:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:07:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:07:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:07:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:07:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:07:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:07:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:07:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:07:45 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:07:45 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:07:45 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:07:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:07:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:07:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:07:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:07:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:07:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:07:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:07:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:07:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:07:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:07:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:07:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:07:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:07:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:07:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:07:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:07:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:07:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:07:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:07:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:07:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:07:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:07:49 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:07:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:07:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:07:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:07:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:07:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:07:50 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:07:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:07:50 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:07:51 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:07:51 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:07:52 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:07:52 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:07:53 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:07:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:07:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:07:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:07:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:07:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:07:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:07:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:07:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:07:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:07:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:07:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:07:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:07:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:07:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:07:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:07:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:07:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:07:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:07:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:07:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:07:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:07:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:07:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:07:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:07:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:07:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:07:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:08:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:08:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:08:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:08:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:08:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:08:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:08:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:08:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:08:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:08:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:08:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:08:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:08:04 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:08:04 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:08:04 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:08:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:08:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:08:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:08:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:08:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:08:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:08:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:08:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:08:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:08:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:08:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:08:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:08:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:08:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:08:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:08:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:08:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:08:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:08:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:08:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:08:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:08:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:08:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:08:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:08:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:08:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:08:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:08:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:08:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:08:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:08:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:08:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:08:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:08:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:08:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:08:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:08:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:08:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:08:09 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:08:09 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:08:10 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:08:10 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:08:11 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:08:11 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:08:11 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:08:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:08:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:08:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:08:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:08:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:08:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:08:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:08:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:08:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:08:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:08:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:08:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1864 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:08:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:08:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:08:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1864 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:08:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:08:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:08:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:08:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:08:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:08:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:08:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:08:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:08:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:08:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:08:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:08:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:08:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:08:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:08:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:08:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:08:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:08:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:08:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:08:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:08:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:08:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:08:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:08:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:08:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:08:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:08:22 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:08:22 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:08:22 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:08:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:08:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:08:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:08:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:08:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:08:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:08:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:08:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:08:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:08:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:08:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:08:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:08:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:08:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:08:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:08:24 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:08:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:08:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:08:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:08:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:08:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:08:25 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:08:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:08:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:08:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:08:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:08:26 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:08:26 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:08:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:08:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:08:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:08:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:08:27 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:08:27 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:08:28 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:08:28 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:08:29 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:08:29 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:08:30 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:08:30 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:08:31 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:08:31 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:08:32 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:08:32 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:08:32 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:08:33 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:08:33 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:08:34 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:08:34 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:08:35 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:08:35 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:08:36 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:08:36 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:08:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:08:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:08:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:08:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:08:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:08:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:08:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:08:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:08:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:08:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:08:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:08:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:08:36 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3168 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:08:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:08:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:08:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:08:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:08:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:08:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:08:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:08:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:08:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:08:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:08:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:08:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:08:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:08:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:08:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:08:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:08:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:08:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:08:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:08:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:08:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:08:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:08:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:08:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:08:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:08:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:08:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:08:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:08:47 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:08:47 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:08:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:08:47 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:08:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:08:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:08:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:08:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:08:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:08:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:08:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:08:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:08:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:08:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:08:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:08:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:08:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:08:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:08:48 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:08:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:08:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:08:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:08:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:08:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:08:49 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:08:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:08:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:08:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:08:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:08:50 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:08:50 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:08:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:08:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:08:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:08:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:08:51 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:08:51 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:08:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:08:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:08:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:08:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:08:51 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:08:52 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:08:52 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:08:53 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:08:53 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:08:54 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:08:54 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:08:55 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:08:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:08:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:08:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:08:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:08:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:08:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:08:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:08:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:08:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:08:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:08:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:08:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:08:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:09:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:09:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:09:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:09:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:09:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:09:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:09:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:09:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:09:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:09:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:09:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:09:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:09:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:09:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:09:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:09:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:09:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:09:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:09:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:09:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:09:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:09:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:09:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:09:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:09:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:09:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:09:05 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:09:05 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:09:05 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:09:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:09:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:09:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:09:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:09:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:09:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:09:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:09:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:09:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:09:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:09:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:09:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:09:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:09:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:09:07 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:09:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:09:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:09:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:09:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:09:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:09:08 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:09:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:09:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:09:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:09:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:09:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:09:09 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:09:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:09:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:09:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:09:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:09:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:09:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:09:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:09:11 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:09:12 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:09:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:09:12 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:09:13 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:09:13 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:09:14 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:09:14 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:09:15 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:09:15 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:09:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:09:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:09:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:09:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:09:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:09:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:09:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:09:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:09:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:09:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:09:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:09:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:09:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:09:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:09:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:09:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:09:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:09:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:09:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:09:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:09:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:09:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:09:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:09:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:09:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:09:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:09:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:09:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:09:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:09:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:09:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:09:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:09:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:09:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:09:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:09:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:09:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:09:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:09:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:09:26 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:09:26 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:09:26 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:09:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:09:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:09:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:09:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:09:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:09:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:09:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:09:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:09:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:09:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:09:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:09:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:09:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:09:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:09:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:09:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:09:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:09:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:09:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:09:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:09:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:09:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:09:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:09:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:09:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:09:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:09:30 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:09:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:09:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:09:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:09:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:09:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:09:31 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:09:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:09:32 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:09:32 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:09:33 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:09:33 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:09:34 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:09:34 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:09:35 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:09:35 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:09:35 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:09:36 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:09:36 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:09:37 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:09:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:09:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:09:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:09:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:09:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:09:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:09:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:09:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:09:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:09:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:09:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:09:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:09:37 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2519 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:09:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:09:37 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2519 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:09:37 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2519 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:09:37 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2519 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:09:37 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2519 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:09:37 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2519 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:09:37 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2519 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:09:37 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2519 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:09:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:09:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:09:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:09:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:09:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:09:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:09:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:09:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:09:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:09:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:09:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:09:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:09:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:09:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:09:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:09:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:09:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:09:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:09:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:09:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:09:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:09:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:09:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:09:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:09:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:09:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:09:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:09:48 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:09:48 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:09:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:09:48 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:09:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:09:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:09:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:09:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:09:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:09:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:09:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:09:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:09:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:09:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:09:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:09:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:09:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:09:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:09:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:09:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:09:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:09:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:09:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:09:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:09:50 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:09:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:09:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:09:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:09:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:09:51 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:09:51 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:09:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:09:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:09:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:09:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:09:51 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:09:52 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:09:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:09:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:09:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:09:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:09:52 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:09:53 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:09:53 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:09:54 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:09:54 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:09:55 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:09:55 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:09:56 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:09:56 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:09:57 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:09:57 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:09:58 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:09:58 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:09:59 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:09:59 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:09:59 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:10:00 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:10:00 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:10:01 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:10:01 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:10:02 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:10:02 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:10:03 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:10:03 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:10:04 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:10:04 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:10:05 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:10:05 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:10:06 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:10:06 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:10:06 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:10:07 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:10:07 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:10:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:10:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:10:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:10:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:10:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:10:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:10:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:10:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:10:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:10:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:10:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:10:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:10:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:10:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:10:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:10:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:10:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:10:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:10:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:10:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:10:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:10:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:10:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:10:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:10:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:10:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:10:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:10:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:10:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:10:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:10:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:10:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:10:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:10:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:10:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:10:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:10:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:10:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:10:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:10:18 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:10:18 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:10:18 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:10:19 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:10:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:10:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:10:20 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:10:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:10:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:10:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:10:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:10:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:10:21 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:10:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:10:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:10:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:10:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:10:21 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:10:22 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:10:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:10:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:10:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:10:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:10:22 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:10:23 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:10:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:10:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:10:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:10:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:10:23 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:10:24 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:10:24 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:10:25 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:10:25 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:10:25 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:10:26 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:10:26 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:10:27 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:10:27 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:10:28 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:10:28 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:10:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:10:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:10:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:10:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:10:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:10:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:10:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:10:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:10:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:10:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2285 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:10:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:10:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:10:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2285 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:10:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2285 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:10:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2285 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:10:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:10:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:10:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:10:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:10:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:10:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:10:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:10:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:10:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:10:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:10:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:10:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:10:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:10:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:10:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:10:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:10:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:10:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:10:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:10:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:10:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:10:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:10:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:10:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:10:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:10:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:10:39 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:10:39 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:10:39 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:10:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:10:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:10:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:10:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:10:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:10:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:10:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:10:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:10:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:10:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:10:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:10:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:10:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:10:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:10:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:10:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:10:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:10:42 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:10:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:10:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:10:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:10:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:10:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:10:43 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:10:43 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:10:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:10:44 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:10:44 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:10:45 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:10:45 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:10:46 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:10:46 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:10:47 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:10:47 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:10:47 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:10:48 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:10:48 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:10:49 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:10:49 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:10:50 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:10:50 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:10:51 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:10:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:10:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:10:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:10:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:10:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:10:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:10:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:10:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:10:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:10:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:10:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:10:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:10:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:10:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:10:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:10:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:10:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:10:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:10:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:10:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:10:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:11:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:11:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:11:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:11:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:11:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:11:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:11:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:11:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:11:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:11:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:11:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:11:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:11:02 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:11:02 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:11:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:11:02 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:11:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:11:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:11:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:11:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:11:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:11:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:11:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:11:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:11:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:11:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:11:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:11:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:11:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:11:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:11:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:11:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:11:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:11:03 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:11:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:11:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:11:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:11:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:11:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:11:04 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:11:04 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:11:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:11:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:11:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:11:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:11:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:11:05 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:11:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:11:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:11:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:11:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:11:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:11:06 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:11:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:11:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:11:07 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:11:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:11:08 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:11:08 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:11:09 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:11:09 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:11:10 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:11:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:11:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:11:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:11:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:11:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:11:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:11:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:11:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:11:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:11:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:11:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:11:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:11:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:11:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:11:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:11:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:11:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:11:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:11:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:11:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:11:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:11:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:11:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:11:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:11:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:11:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:11:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:11:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:11:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:11:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:11:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:11:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:11:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:11:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:11:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:11:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:11:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:11:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:11:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:11:20 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:11:20 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:11:20 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:11:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:11:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:11:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:11:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:11:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:11:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:11:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:11:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:11:21 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:11:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:11:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:11:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:11:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:11:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:11:22 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:11:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:11:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:11:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:11:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:11:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:11:23 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:11:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:11:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:11:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:11:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:11:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:11:24 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:11:25 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:11:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:11:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:11:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:11:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:11:25 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:11:25 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:11:26 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:11:26 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:11:27 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:11:27 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:11:28 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:11:28 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:11:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:11:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:11:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:11:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:11:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:11:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:11:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:11:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:11:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:11:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:11:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:11:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:11:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1864 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:11:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:11:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1864 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:11:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1864 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:11:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1864 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:11:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1864 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:11:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1864 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:11:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1864 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:11:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1864 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:11:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:11:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:11:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:11:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:11:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:11:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:11:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:11:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:11:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:11:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:11:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:11:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:11:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:11:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:11:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:11:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:11:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:11:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:11:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:11:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:11:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:11:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:11:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:11:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:11:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:11:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:11:39 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:11:39 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:11:39 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:11:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:11:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:11:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:11:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:11:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:11:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:11:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:11:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:11:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:11:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:11:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:11:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:11:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:11:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:11:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:11:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:11:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:11:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:11:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:11:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:11:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:11:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:11:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:11:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:11:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:11:42 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:11:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:11:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:11:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:11:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:11:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:11:43 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:11:43 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:11:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:11:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:11:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:11:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:11:44 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:11:44 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:11:45 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:11:45 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:11:46 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:11:46 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:11:46 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:11:47 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:11:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:11:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:11:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:11:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:11:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:11:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:11:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:11:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:11:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:11:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:11:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:11:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:11:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:11:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:11:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:11:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:11:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:11:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:11:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:11:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:11:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:11:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:11:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:11:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:11:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:11:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:11:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:11:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:11:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:11:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:11:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:11:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:11:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:11:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:11:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:11:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:11:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:11:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:11:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:11:58 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:11:58 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:11:58 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:11:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:11:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:11:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:11:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:11:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:11:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:11:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:11:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:11:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:11:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:11:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:11:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:11:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:11:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:11:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:11:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:11:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:11:59 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:11:59 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:11:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:11:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:11:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:11:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:12:00 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:12:00 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:12:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:12:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:12:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:12:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:12:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:12:01 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:12:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:12:01 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:12:02 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:12:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:12:02 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:12:03 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:12:03 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:12:04 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:12:04 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:12:05 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:12:05 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:12:06 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:12:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:12:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:12:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:12:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:12:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:12:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:12:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:12:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:12:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:12:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:12:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:12:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:12:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:12:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:12:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:12:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:12:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:12:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:12:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:12:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:12:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:12:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:12:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:12:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:12:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:12:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:12:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:12:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:12:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:12:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:12:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:12:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:12:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:12:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:12:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:12:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:12:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:12:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:12:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:12:16 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:12:16 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:12:16 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:12:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:12:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:12:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:12:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:12:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:12:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:12:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:12:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:12:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:12:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:12:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:12:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:12:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:12:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:12:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:12:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:12:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:12:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:12:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:12:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:12:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:12:20 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:12:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:12:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:12:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:12:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:12:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:12:21 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:12:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:12:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:12:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:12:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:12:21 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:12:21 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:12:22 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:12:22 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:12:23 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:12:23 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:12:24 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:12:24 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:12:25 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:12:25 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:12:26 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:12:26 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:12:27 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:12:27 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:12:28 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:12:28 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:12:28 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:12:29 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:12:29 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:12:30 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:12:30 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:12:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:12:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:12:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:12:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:12:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:12:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:12:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:12:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:12:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:12:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:12:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:12:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:12:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:12:30 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3171 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:12:30 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3171 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:12:30 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3171 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:12:30 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3171 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:12:30 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3171 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:12:30 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3171 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:12:30 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3171 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:12:30 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3171 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:12:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:12:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:12:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:12:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:12:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:12:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:12:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:12:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:12:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:12:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:12:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:12:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:12:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:12:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:12:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:12:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:12:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:12:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:12:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:12:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:12:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:12:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:12:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:12:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:12:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:12:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:12:41 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:12:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:12:41 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:12:41 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:12:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:12:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:12:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:12:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:12:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:12:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:12:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:12:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:12:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:12:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:12:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:12:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:12:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:12:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:12:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:12:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:12:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:12:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:12:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:12:43 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:12:43 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:12:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:12:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:12:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:12:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:12:44 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:12:44 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:12:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:12:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:12:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:12:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:12:45 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:12:45 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:12:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:12:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:12:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:12:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:12:46 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:12:46 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:12:47 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:12:47 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:12:48 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:12:48 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:12:48 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:12:49 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:12:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:12:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:12:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:12:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:12:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:12:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:12:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:12:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:12:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:12:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:12:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1864 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:12:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:12:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:12:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:12:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1864 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:12:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1864 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:12:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1864 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:12:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:12:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:12:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:12:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:12:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:12:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:12:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:12:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:12:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:12:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:12:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:12:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:12:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:12:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:12:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:12:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:12:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:12:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:12:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:12:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:12:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:12:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:12:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:12:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:12:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:12:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:13:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:13:00 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:13:00 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:13:00 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:13:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:13:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:13:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:13:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:13:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:13:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:13:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:13:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:13:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:13:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:13:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:13:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:13:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:13:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:13:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:13:01 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:13:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:13:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:13:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:13:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:13:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:13:02 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:13:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:13:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:13:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:13:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:13:02 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:13:03 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:13:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:13:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:13:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:13:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:13:03 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:13:04 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:13:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:13:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:13:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:13:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:13:04 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:13:05 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:13:05 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:13:06 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:13:06 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:13:07 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:13:07 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:13:08 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:13:08 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:13:09 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:13:09 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:13:09 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:13:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:13:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:13:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:13:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:13:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:13:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:13:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:13:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:13:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:13:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:13:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:13:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:13:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:13:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:13:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:13:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:13:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:13:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:13:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:13:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:13:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:13:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:13:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:13:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:13:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:13:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:13:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:13:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:13:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:13:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:13:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:13:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:13:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:13:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:13:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:13:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:13:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:13:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:13:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:13:20 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:13:20 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:13:20 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:13:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:13:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:13:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:13:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:13:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:13:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:13:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:13:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:13:21 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:13:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:13:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:13:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:13:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:13:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:13:22 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:13:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:13:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:13:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:13:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:13:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:13:23 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:13:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:13:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:13:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:13:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:13:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:13:24 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:13:24 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:13:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:13:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:13:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:13:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:13:25 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:13:25 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:13:26 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:13:26 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:13:27 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:13:27 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:13:28 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:13:28 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:13:29 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:13:29 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:13:30 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:13:30 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:13:31 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:13:31 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:13:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:13:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:13:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:13:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:13:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:13:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:13:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:13:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:13:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:13:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:13:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:13:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:13:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2514 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:13:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:13:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2514 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:13:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2514 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:13:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:13:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:13:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:13:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:13:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:13:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:13:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:13:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:13:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:13:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:13:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:13:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:13:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:13:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:13:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:13:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:13:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:13:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:13:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:13:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:13:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:13:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:13:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:13:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:13:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:13:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:13:42 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:13:42 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:13:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:13:42 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:13:42 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:13:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:13:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:13:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:13:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:13:43 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:13:43 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:13:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:13:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:13:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:13:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:13:44 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:13:44 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:13:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:13:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:13:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:13:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:13:45 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:13:45 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:13:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:13:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:13:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:13:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:13:46 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:13:46 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:13:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:13:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:13:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:13:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:13:47 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:13:47 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:13:48 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:13:48 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:13:48 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:13:49 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:13:49 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:13:50 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:13:50 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:13:51 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:13:51 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:13:52 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:13:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:13:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:13:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:13:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:13:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:13:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:13:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:13:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:13:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:13:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:13:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:13:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:13:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:13:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:13:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:13:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:13:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:13:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:13:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:13:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:13:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:13:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:13:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:13:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:13:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:14:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:14:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:14:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:14:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:14:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:14:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:14:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:14:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:14:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:14:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:14:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:14:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:14:03 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:14:03 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:14:03 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:14:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:14:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:14:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:14:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:14:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:14:03 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:14:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:14:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:14:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:14:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:14:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:14:04 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:14:05 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:14:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:14:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:14:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:14:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:14:05 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:14:06 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:14:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:14:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:14:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:14:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:14:06 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:14:07 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:14:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:14:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:14:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:14:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:14:07 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:14:08 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:14:08 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:14:09 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:14:09 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:14:10 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:14:10 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:14:11 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:14:11 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:14:12 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:14:12 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:14:12 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:14:13 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:14:13 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:14:14 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:14:14 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:14:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:14:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:14:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:14:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:14:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:14:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:14:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:14:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:14:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:14:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2713 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:14:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:14:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:14:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2713 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:14:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2713 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:14:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2713 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:14:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2713 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:14:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2713 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:14:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2713 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:14:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2713 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:14:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:14:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:14:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:14:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:14:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:14:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:14:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:14:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:14:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:14:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:14:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:14:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:14:20 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:14:20 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:14:20 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:14:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:14:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:14:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:14:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:14:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:14:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:14:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:14:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:14:21 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:14:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:14:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:14:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:14:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:14:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:14:22 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:14:22 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:14:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:14:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:14:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:14:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:14:23 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:14:23 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:14:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:14:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:14:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:14:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:14:24 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:14:24 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:14:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:14:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:14:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:14:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:14:25 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:14:25 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:14:26 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:14:26 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:14:27 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:14:27 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:14:28 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:14:28 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:14:29 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:14:29 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:14:30 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:14:30 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:14:30 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:14:31 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:14:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:14:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:14:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:14:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:14:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:14:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:14:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:14:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:14:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:14:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:14:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:14:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:14:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2514 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:14:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:14:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2514 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:14:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2514 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:14:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2514 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:14:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2514 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:14:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2514 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:14:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2514 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:14:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2514 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:14:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:14:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:14:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:14:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:14:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:14:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:14:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:14:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:14:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:14:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:14:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:14:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:14:37 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:14:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:14:37 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:14:37 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:14:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:14:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:14:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:14:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:14:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:14:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:14:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:14:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:14:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:14:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:14:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:14:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:14:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:14:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:14:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:14:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:14:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:14:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:14:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:14:39 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:14:39 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:14:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:14:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:14:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:14:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:14:40 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:14:40 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:14:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:14:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:14:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:14:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:14:40 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:14:41 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:14:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:14:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:14:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:14:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:14:41 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:14:42 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:14:42 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:14:43 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:14:43 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:14:44 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:14:44 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:14:45 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:14:45 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:14:46 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:14:46 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:14:47 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:14:47 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:14:48 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:14:48 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:14:48 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:14:49 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:14:49 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:14:50 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:14:50 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:14:51 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:14:51 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:14:52 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:14:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:14:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:14:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:14:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:14:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:14:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:14:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:14:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:14:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:14:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:14:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:14:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:14:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:14:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:14:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:14:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:14:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:14:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:14:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:14:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:14:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:14:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:14:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:14:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:14:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:14:57 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:14:57 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:14:57 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:14:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:14:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:14:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:14:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:15:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:15:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:15:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:15:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:15:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:15:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:15:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:15:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:15:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:15:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:15:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:15:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:15:03 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:03 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:15:03 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:15:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:15:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:15:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:15:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:15:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:15:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:15:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:15:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:15:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:15:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:15:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:15:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:15:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:15:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:15:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:15:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:15:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:15:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:15:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:15:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:15:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:15:10 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:15:10 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:15:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:10 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:15:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:15:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:15:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:10 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:15:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:15:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:15:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:15:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:15:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:15:11 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:15:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:15:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:15:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:15:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:15:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:15:12 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:15:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:15:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:15:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:15:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:15:13 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:15:13 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:15:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:15:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:15:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:15:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:15:13 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:15:14 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:15:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:15:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:15:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:15:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:15:14 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:15 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:15:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:15:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:15:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:15 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:15:16 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:15:16 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:15:17 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:15:17 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:15:18 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:15:18 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:15:19 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:15:19 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:15:20 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:15:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:15:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:15:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:20 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:15:21 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:15:21 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:15:21 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:15:22 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:15:22 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:15:23 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:15:23 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:15:24 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:15:24 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:15:25 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:15:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:15:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:15:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:25 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:15:26 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:15:26 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:15:27 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:15:27 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:15:28 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:15:28 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:15:29 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:15:29 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:15:29 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:15:30 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:15:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:15:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:15:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:15:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:15:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:15:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:15:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:15:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:15:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:15:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:15:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:15:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:15:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:15:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:15:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:15:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:15:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:15:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:15:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:15:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:15:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:15:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:15:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:15:36 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:36 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:15:36 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:15:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:15:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:15:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:15:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:15:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:15:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:15:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:15:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:15:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:15:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:15:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:15:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:15:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:15:38 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:15:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:15:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:15:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:15:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:15:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:15:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:15:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:15:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:15:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:15:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:15:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:15:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:15:40 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:15:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:15:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:15:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:15:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:15:40 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:15:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:15:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:15:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:41 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:15:41 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:15:42 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:15:42 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:15:43 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:15:43 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:15:44 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:15:44 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:15:45 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:15:45 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:15:45 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:15:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:15:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:15:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:46 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:15:46 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:15:47 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:15:47 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:15:48 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:15:48 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:15:49 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:15:49 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:15:50 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:15:50 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:15:51 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:15:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:15:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:15:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:15:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:15:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:15:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:51 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:15:52 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:15:52 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:15:53 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:15:53 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:15:53 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:15:54 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:15:54 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:15:55 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:15:55 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:15:56 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:15:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:15:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:15:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:15:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:15:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:15:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:15:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:15:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:15:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:15:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:15:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:15:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:15:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:15:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:15:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:16:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:16:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:16:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:16:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:16:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:16:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:16:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:16:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:16:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:16:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:16:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:16:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:16:02 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:16:02 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:16:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:02 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:16:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:16:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:16:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:16:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:16:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:16:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:16:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:16:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:16:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:16:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:16:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:16:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:16:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:16:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:16:04 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:16:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:16:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:16:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:16:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:16:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:16:05 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:16:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:16:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:16:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:16:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:16:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:16:06 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:16:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:16:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:16:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:16:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:16:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:16:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:16:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:16:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:07 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:16:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:16:08 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:16:08 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:16:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:16:09 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:16:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:16:10 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:16:10 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:16:11 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:16:11 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:16:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:16:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:16:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:12 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:16:12 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:16:13 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:16:13 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:16:14 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:16:14 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:16:15 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:16:15 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:16:16 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:16:16 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:16:16 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:16:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:16:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:16:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:17 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:16:17 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:16:18 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:16:18 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:16:19 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:16:19 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:16:20 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:16:20 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:16:21 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:16:21 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:16:22 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:16:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:16:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:16:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:16:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:16:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:16:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:16:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:16:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:16:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:16:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:16:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:16:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:16:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:16:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:16:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:16:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:16:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:16:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:16:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:16:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:16:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:16:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:16:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:16:27 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:27 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:16:27 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:16:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:16:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:16:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:16:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:16:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:16:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:16:29 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:16:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:16:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:16:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:16:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:16:29 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:16:30 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:16:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:16:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:16:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:16:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:16:30 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:16:31 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:16:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:16:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:16:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:16:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:16:31 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:16:32 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:16:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:16:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:16:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:16:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:16:32 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:16:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:32 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:16:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:16:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:16:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:33 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:16:33 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:16:34 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:16:34 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:16:35 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:16:35 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:16:36 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:16:36 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:16:37 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:16:37 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:16:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:16:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:16:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:38 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:16:38 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:16:39 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:16:39 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:16:39 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:16:40 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:16:40 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:16:41 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:16:41 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:16:42 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:16:42 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:16:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:16:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:16:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:43 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:16:43 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:16:44 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:16:44 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:16:45 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:16:45 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:16:46 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:16:46 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:16:47 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:16:47 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:16:47 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:16:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:16:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:16:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:16:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:16:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:16:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:16:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:16:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:16:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4529 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:16:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:16:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:16:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4529 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:16:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4529 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:16:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4529 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:16:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4529 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:16:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4529 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:16:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4529 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:16:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4529 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:16:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:16:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:16:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:16:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:16:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:16:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:16:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:16:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:16:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:16:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:16:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:16:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:16:53 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:16:53 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:53 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:16:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:16:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:16:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:16:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:16:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:16:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:16:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:16:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:16:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:16:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:16:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:16:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:16:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:16:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:16:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:16:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:16:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:16:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:16:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:16:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:16:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:16:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:16:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:16:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:16:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:16:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:16:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:17:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:17:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:17:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:17:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:17:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:17:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:17:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:17:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:17:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:17:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:17:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:17:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:17:01 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:17:01 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:17:01 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:17:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:17:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:17:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:17:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:17:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:17:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:17:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:17:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:17:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:17:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:17:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:17:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:17:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:17:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:17:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:17:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:17:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:17:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:17:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:17:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:17:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:17:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:17:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:17:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:17:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:17:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:17:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:17:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:17:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:17:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:17:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:17:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:17:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:17:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:17:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:17:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:17:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:17:08 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:17:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:17:09 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:17:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:17:10 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:17:10 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:17:10 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:17:11 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:17:11 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:17:12 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:17:12 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:17:13 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:17:13 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:17:14 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:17:14 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:17:15 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:17:15 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:17:16 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:17:16 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:17:17 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:17:17 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:17:18 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:17:18 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:17:18 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:17:19 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:17:19 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:17:20 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:17:20 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:17:21 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:17:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:17:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:17:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:17:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:17:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:17:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:17:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:17:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:17:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:17:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:17:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:17:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:17:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:17:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:17:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:17:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:17:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:17:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:17:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:17:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:17:21 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:17:22 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:17:22 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 09:17:23 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 09:17:23 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 09:17:24 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 09:17:24 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 09:17:25 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 09:17:25 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 09:17:25 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 09:17:26 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 09:17:26 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 09:17:27 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 09:17:27 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 09:17:28 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 09:17:28 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 09:17:29 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 09:17:29 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 09:17:30 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 09:17:30 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 09:17:31 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 09:17:31 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 09:17:32 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 09:17:32 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 09:17:33 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 09:17:33 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 09:17:33 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 09:17:34 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 09:17:34 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 09:17:35 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 09:17:35 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 09:17:36 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 09:17:36 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 09:17:37 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 09:17:37 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-24 09:17:38 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-24 09:17:38 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-24 09:17:39 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-24 09:17:39 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-24 09:17:40 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-24 09:17:40 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-24 09:17:40 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-24 09:17:41 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-24 09:17:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:17:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:17:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:17:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:17:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:17:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:17:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:17:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:17:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:17:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:17:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:17:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:17:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:17:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:17:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:17:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:17:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:17:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:17:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:17:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:17:41 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-24 09:17:42 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-24 09:17:42 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-24 09:17:43 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-24 09:17:43 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-24 09:17:44 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-24 09:17:44 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-24 09:17:45 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-24 09:17:45 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-24 09:17:46 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-24 09:17:46 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-24 09:17:47 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-24 09:17:47 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-24 09:17:48 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-24 09:17:48 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-24 09:17:48 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-24 09:17:49 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-24 09:17:49 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-24 09:17:50 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-24 09:17:50 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-24 09:17:51 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-24 09:17:51 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-24 09:17:52 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-24 09:17:52 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-24 09:17:53 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-24 09:17:53 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-24 09:17:54 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-24 09:17:54 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-24 09:17:55 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-24 09:17:55 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-24 09:17:56 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-24 09:17:56 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-24 09:17:56 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-24 09:17:57 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-24 09:17:57 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-24 09:17:58 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-24 09:17:58 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-24 09:17:59 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-24 09:17:59 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-24 09:18:00 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-24 09:18:00 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-24 09:18:01 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-24 09:18:01 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-24 09:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:18:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:18:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:18:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:02 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-24 09:18:02 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-24 09:18:03 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-24 09:18:03 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-24 09:18:03 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-24 09:18:04 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-24 09:18:04 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-24 09:18:05 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-24 09:18:05 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-24 09:18:06 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-24 09:18:06 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-24 09:18:07 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-24 09:18:07 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-24 09:18:08 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-24 09:18:08 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-24 09:18:09 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-24 09:18:09 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-24 09:18:10 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-24 09:18:10 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-24 09:18:11 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-24 09:18:11 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-24 09:18:11 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-24 09:18:12 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-24 09:18:12 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-24 09:18:13 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-24 09:18:13 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-24 09:18:14 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-24 09:18:14 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-24 09:18:15 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-24 09:18:15 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-24 09:18:16 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-24 09:18:16 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-24 09:18:17 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-24 09:18:17 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-24 09:18:18 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-24 09:18:18 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-24 09:18:18 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-24 09:18:19 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-24 09:18:19 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-24 09:18:20 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-24 09:18:20 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-24 09:18:21 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-24 09:18:21 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-24 09:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:18:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:18:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:18:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:18:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:18:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:18:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:18:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:18:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:18:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:18:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:18:21 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=17574 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:18:21 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=17574 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:18:21 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=17574 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:18:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:18:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:18:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:18:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:18:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:18:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:18:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:18:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:18:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:18:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:18:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:18:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:18:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:18:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:18:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:18:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:18:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:18:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:18:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:18:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:18:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:18:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:18:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:18:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:18:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:18:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:18:32 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:18:32 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:32 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:18:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:18:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:18:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:18:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:33 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:18:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:18:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:18:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:18:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:18:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:18:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:18:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:18:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:18:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:18:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:34 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:18:34 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:18:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:18:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:18:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:18:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:18:35 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:18:35 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:18:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:18:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:18:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:18:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:18:36 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:18:36 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:18:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:18:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:18:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:18:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:18:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:18:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:18:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:18:37 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:18:37 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:18:38 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:18:38 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:18:39 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:18:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:18:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:18:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:18:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:39 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:18:39 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:18:40 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:18:40 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:18:41 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:18:41 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:18:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:18:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:18:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:18:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:18:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:42 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:18:42 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:18:43 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:18:43 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:18:44 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:18:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:18:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:18:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:18:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:44 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:18:45 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:18:45 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:18:46 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:18:46 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:18:47 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:18:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:18:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:18:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:18:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:47 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:18:47 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:18:48 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:18:48 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:18:49 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:18:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:18:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:18:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:18:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:18:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:18:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:18:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:18:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3846 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:18:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:18:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3846 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:18:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3846 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:18:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3846 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:18:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3847 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:18:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3847 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:18:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3847 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:18:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3847 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:18:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3847 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:18:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3847 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:18:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3847 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:18:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3847 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:18:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:18:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:18:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:18:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:18:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:18:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:18:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:18:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:18:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:18:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:18:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:18:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:18:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:18:55 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:18:55 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:18:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:55 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:18:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:18:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:18:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:18:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:18:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:18:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:18:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:18:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:18:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:18:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:18:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:18:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:18:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:18:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:18:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:18:57 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:18:57 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:18:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:18:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:18:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:18:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:18:58 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:18:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:18:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:18:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:18:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:18:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:18:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:18:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:18:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:18:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:18:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:18:58 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:18:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:18:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:18:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:18:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:18:58 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:18:59 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:18:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:18:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:18:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:18:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:18:59 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:19:00 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:19:00 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:19:01 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:19:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:19:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:19:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:01 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:19:02 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:19:02 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:19:03 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:19:03 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:19:04 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:19:04 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:19:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:19:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:19:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:05 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:19:05 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:19:06 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:19:06 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:19:06 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:19:07 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:19:07 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:19:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:19:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:19:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:19:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:19:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:19:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:19:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:19:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:19:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:19:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:19:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:19:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:19:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:19:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:19:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:19:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:19:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:19:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:19:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:19:13 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:19:13 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:19:13 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:19:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:19:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:19:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:19:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:19:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:19:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:19:17 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:19:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:19:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:19:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:19:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:19:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:19:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:19:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:19:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:19:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:19:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:19:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:19:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:19:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:19:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:19:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:19:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:19:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:19:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:19:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:19:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:19:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:19:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:19:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:19:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:19:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:19:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:19:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:19:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:19:26 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:19:26 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:26 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:19:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:19:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:19:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:19:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:19:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:19:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:19:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:19:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:19:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:19:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:28 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:19:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:19:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:19:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:19:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:29 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:19:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:19:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:30 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:19:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:19:31 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:19:32 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:19:32 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:19:33 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:19:33 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:19:34 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:19:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:34 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:19:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:19:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:19:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:35 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:19:35 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:19:36 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:19:36 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:19:36 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:19:37 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:19:37 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:19:38 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:19:38 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:19:39 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:19:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:19:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:19:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:19:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:19:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:19:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:19:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:19:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:19:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:19:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:19:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:19:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:19:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:19:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:19:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:19:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:19:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:19:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:19:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:19:45 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:19:45 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:45 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:19:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:19:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:19:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:19:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:19:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:19:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:19:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:19:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:19:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:19:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:19:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:48 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:19:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:19:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:49 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:19:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:19:50 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:19:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:19:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:19:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:19:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:19:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:19:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:19:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:19:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:19:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:19:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:19:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:19:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:19:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:19:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:19:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:19:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:19:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:19:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:19:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:19:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:19:56 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:19:56 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:19:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:56 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:19:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:19:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:19:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:19:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:19:57 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:19:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:58 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:19:58 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:19:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:19:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:19:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:19:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:19:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:19:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:19:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:19:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:19:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:19:59 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:19:59 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:19:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:19:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:19:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:19:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:19:59 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:20:00 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:20:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:20:00 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:20:01 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:20:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:20:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:20:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:20:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:20:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:20:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:20:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:20:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:20:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:20:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:20:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:01 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:20:02 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:20:02 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:20:03 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:20:03 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:20:04 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:20:04 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:20:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:20:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:20:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:20:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:20:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:20:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:20:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:20:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:20:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:20:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:20:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:05 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:20:05 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:20:06 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:20:06 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:20:06 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:20:07 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:20:07 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:20:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:20:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:20:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:20:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:20:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:20:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:20:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:20:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:20:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:20:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:20:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:20:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2726 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:20:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:20:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2727 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:20:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2727 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:20:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2727 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:20:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2727 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:20:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2727 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:20:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2727 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:20:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2727 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:20:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2727 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:20:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:20:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:20:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:20:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:20:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:20:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:20:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:20:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:20:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:20:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:20:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:20:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:20:13 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:20:13 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:20:13 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:20:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:20:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:20:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:20:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:20:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:20:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:20:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:20:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=532 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:20:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:20:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=532 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:20:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=532 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:20:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=532 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:20:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=532 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:20:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=532 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:20:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=532 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:20:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=532 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:20:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:20:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:20:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:20:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:20:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:20:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:20:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:20:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:20:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:20:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:20:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:20:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:20:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:20:21 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:20:21 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:20:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:20:21 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:20:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:20:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:20:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:20:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:20:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:20:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:20:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:20:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:20:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:20:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:20:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:20:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:20:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:20:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:20:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:20:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:20:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:20:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:20:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:20:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:20:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:20:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:20:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:20:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:20:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:20:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:20:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:20:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:20:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:20:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:20:25 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:20:25 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:20:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:20:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:20:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:20:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:20:25 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:20:26 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:20:26 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:20:27 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:20:27 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:20:28 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:20:28 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:20:29 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:20:29 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:20:30 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:20:30 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:20:31 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:20:31 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:20:32 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:20:32 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:20:33 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:20:33 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:20:33 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:20:34 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:20:34 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:20:35 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:20:35 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:20:36 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:20:36 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:20:37 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:20:37 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:20:38 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:20:38 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:20:39 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:20:39 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:20:40 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:20:40 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:20:40 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:20:41 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:20:41 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:20:42 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 09:20:42 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 09:20:43 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 09:20:43 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 09:20:44 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 09:20:44 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 09:20:45 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 09:20:45 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 09:20:46 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 09:20:46 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 09:20:47 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 09:20:47 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 09:20:48 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 09:20:48 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 09:20:48 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 09:20:49 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 09:20:49 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 09:20:50 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 09:20:50 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 09:20:51 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 09:20:51 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 09:20:52 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 09:20:52 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 09:20:53 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 09:20:53 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 09:20:54 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 09:20:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:20:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:20:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:20:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:20:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:20:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:20:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:20:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:20:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:20:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:20:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:20:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:20:54 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 09:20:55 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 09:20:55 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 09:20:56 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 09:20:56 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 09:20:56 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 09:20:57 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-24 09:20:57 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-24 09:20:58 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-24 09:20:58 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-24 09:20:59 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-24 09:20:59 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-24 09:21:00 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-24 09:21:00 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-24 09:21:01 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-24 09:21:01 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-24 09:21:02 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-24 09:21:02 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-24 09:21:03 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-24 09:21:03 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-24 09:21:03 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-24 09:21:04 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-24 09:21:04 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-24 09:21:05 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-24 09:21:05 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-24 09:21:06 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-24 09:21:06 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-24 09:21:07 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-24 09:21:07 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-24 09:21:08 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-24 09:21:08 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-24 09:21:09 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-24 09:21:09 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-24 09:21:10 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-24 09:21:10 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-24 09:21:11 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-24 09:21:11 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-24 09:21:11 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-24 09:21:12 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-24 09:21:12 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-24 09:21:13 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-24 09:21:13 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-24 09:21:14 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-24 09:21:14 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-24 09:21:15 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-24 09:21:15 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-24 09:21:16 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-24 09:21:16 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-24 09:21:17 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-24 09:21:17 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-24 09:21:18 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-24 09:21:18 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-24 09:21:19 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-24 09:21:19 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-24 09:21:19 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-24 09:21:20 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-24 09:21:20 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-24 09:21:21 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-24 09:21:21 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-24 09:21:22 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-24 09:21:22 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-24 09:21:23 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-24 09:21:23 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-24 09:21:24 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-24 09:21:24 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-24 09:21:25 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-24 09:21:25 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-24 09:21:26 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-24 09:21:26 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-24 09:21:26 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-24 09:21:27 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-24 09:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:21:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:21:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:21:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:21:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:21:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:21:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:21:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:21:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:21:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:21:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:21:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:21:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:21:27 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-24 09:21:28 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-24 09:21:28 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-24 09:21:29 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-24 09:21:29 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-24 09:21:30 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-24 09:21:30 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-24 09:21:31 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-24 09:21:31 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-24 09:21:32 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-24 09:21:32 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-24 09:21:33 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-24 09:21:33 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-24 09:21:34 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-24 09:21:34 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-24 09:21:34 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-24 09:21:35 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-24 09:21:35 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-24 09:21:36 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-24 09:21:36 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-24 09:21:37 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-24 09:21:37 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-24 09:21:38 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-24 09:21:38 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-24 09:21:39 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-24 09:21:39 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-24 09:21:40 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-24 09:21:40 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-24 09:21:41 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-24 09:21:41 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-24 09:21:41 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-24 09:21:42 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-24 09:21:42 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-24 09:21:43 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-24 09:21:43 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-24 09:21:44 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-24 09:21:44 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-24 09:21:45 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-24 09:21:45 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-24 09:21:46 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-24 09:21:46 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-24 09:21:47 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-24 09:21:47 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-24 09:21:48 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-24 09:21:48 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-24 09:21:49 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2024-10-24 09:21:49 [DEBUG] clck_gen.py:102 IND CLOCK 19278
2024-10-24 09:21:49 [DEBUG] clck_gen.py:102 IND CLOCK 19380
2024-10-24 09:21:50 [DEBUG] clck_gen.py:102 IND CLOCK 19482
2024-10-24 09:21:50 [DEBUG] clck_gen.py:102 IND CLOCK 19584
2024-10-24 09:21:51 [DEBUG] clck_gen.py:102 IND CLOCK 19686
2024-10-24 09:21:51 [DEBUG] clck_gen.py:102 IND CLOCK 19788
2024-10-24 09:21:52 [DEBUG] clck_gen.py:102 IND CLOCK 19890
2024-10-24 09:21:52 [DEBUG] clck_gen.py:102 IND CLOCK 19992
2024-10-24 09:21:53 [DEBUG] clck_gen.py:102 IND CLOCK 20094
2024-10-24 09:21:53 [DEBUG] clck_gen.py:102 IND CLOCK 20196
2024-10-24 09:21:54 [DEBUG] clck_gen.py:102 IND CLOCK 20298
2024-10-24 09:21:54 [DEBUG] clck_gen.py:102 IND CLOCK 20400
2024-10-24 09:21:55 [DEBUG] clck_gen.py:102 IND CLOCK 20502
2024-10-24 09:21:55 [DEBUG] clck_gen.py:102 IND CLOCK 20604
2024-10-24 09:21:56 [DEBUG] clck_gen.py:102 IND CLOCK 20706
2024-10-24 09:21:56 [DEBUG] clck_gen.py:102 IND CLOCK 20808
2024-10-24 09:21:56 [DEBUG] clck_gen.py:102 IND CLOCK 20910
2024-10-24 09:21:57 [DEBUG] clck_gen.py:102 IND CLOCK 21012
2024-10-24 09:21:57 [DEBUG] clck_gen.py:102 IND CLOCK 21114
2024-10-24 09:21:58 [DEBUG] clck_gen.py:102 IND CLOCK 21216
2024-10-24 09:21:58 [DEBUG] clck_gen.py:102 IND CLOCK 21318
2024-10-24 09:21:59 [DEBUG] clck_gen.py:102 IND CLOCK 21420
2024-10-24 09:21:59 [DEBUG] clck_gen.py:102 IND CLOCK 21522
2024-10-24 09:22:00 [DEBUG] clck_gen.py:102 IND CLOCK 21624
2024-10-24 09:22:00 [DEBUG] clck_gen.py:102 IND CLOCK 21726
2024-10-24 09:22:01 [DEBUG] clck_gen.py:102 IND CLOCK 21828
2024-10-24 09:22:01 [DEBUG] clck_gen.py:102 IND CLOCK 21930
2024-10-24 09:22:02 [DEBUG] clck_gen.py:102 IND CLOCK 22032
2024-10-24 09:22:02 [DEBUG] clck_gen.py:102 IND CLOCK 22134
2024-10-24 09:22:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:22:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:22:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:22:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:22:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:22:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:22:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:22:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:22:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:22:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:22:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:22:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:22:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:22:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:22:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:22:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:22:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:22:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:22:03 [DEBUG] clck_gen.py:102 IND CLOCK 22236
2024-10-24 09:22:03 [DEBUG] clck_gen.py:102 IND CLOCK 22338
2024-10-24 09:22:04 [DEBUG] clck_gen.py:102 IND CLOCK 22440
2024-10-24 09:22:04 [DEBUG] clck_gen.py:102 IND CLOCK 22542
2024-10-24 09:22:04 [DEBUG] clck_gen.py:102 IND CLOCK 22644
2024-10-24 09:22:05 [DEBUG] clck_gen.py:102 IND CLOCK 22746
2024-10-24 09:22:05 [DEBUG] clck_gen.py:102 IND CLOCK 22848
2024-10-24 09:22:06 [DEBUG] clck_gen.py:102 IND CLOCK 22950
2024-10-24 09:22:06 [DEBUG] clck_gen.py:102 IND CLOCK 23052
2024-10-24 09:22:07 [DEBUG] clck_gen.py:102 IND CLOCK 23154
2024-10-24 09:22:07 [DEBUG] clck_gen.py:102 IND CLOCK 23256
2024-10-24 09:22:08 [DEBUG] clck_gen.py:102 IND CLOCK 23358
2024-10-24 09:22:08 [DEBUG] clck_gen.py:102 IND CLOCK 23460
2024-10-24 09:22:09 [DEBUG] clck_gen.py:102 IND CLOCK 23562
2024-10-24 09:22:09 [DEBUG] clck_gen.py:102 IND CLOCK 23664
2024-10-24 09:22:10 [DEBUG] clck_gen.py:102 IND CLOCK 23766
2024-10-24 09:22:10 [DEBUG] clck_gen.py:102 IND CLOCK 23868
2024-10-24 09:22:11 [DEBUG] clck_gen.py:102 IND CLOCK 23970
2024-10-24 09:22:11 [DEBUG] clck_gen.py:102 IND CLOCK 24072
2024-10-24 09:22:12 [DEBUG] clck_gen.py:102 IND CLOCK 24174
2024-10-24 09:22:12 [DEBUG] clck_gen.py:102 IND CLOCK 24276
2024-10-24 09:22:12 [DEBUG] clck_gen.py:102 IND CLOCK 24378
2024-10-24 09:22:13 [DEBUG] clck_gen.py:102 IND CLOCK 24480
2024-10-24 09:22:13 [DEBUG] clck_gen.py:102 IND CLOCK 24582
2024-10-24 09:22:14 [DEBUG] clck_gen.py:102 IND CLOCK 24684
2024-10-24 09:22:14 [DEBUG] clck_gen.py:102 IND CLOCK 24786
2024-10-24 09:22:15 [DEBUG] clck_gen.py:102 IND CLOCK 24888
2024-10-24 09:22:15 [DEBUG] clck_gen.py:102 IND CLOCK 24990
2024-10-24 09:22:16 [DEBUG] clck_gen.py:102 IND CLOCK 25092
2024-10-24 09:22:16 [DEBUG] clck_gen.py:102 IND CLOCK 25194
2024-10-24 09:22:17 [DEBUG] clck_gen.py:102 IND CLOCK 25296
2024-10-24 09:22:17 [DEBUG] clck_gen.py:102 IND CLOCK 25398
2024-10-24 09:22:18 [DEBUG] clck_gen.py:102 IND CLOCK 25500
2024-10-24 09:22:18 [DEBUG] clck_gen.py:102 IND CLOCK 25602
2024-10-24 09:22:19 [DEBUG] clck_gen.py:102 IND CLOCK 25704
2024-10-24 09:22:19 [DEBUG] clck_gen.py:102 IND CLOCK 25806
2024-10-24 09:22:19 [DEBUG] clck_gen.py:102 IND CLOCK 25908
2024-10-24 09:22:20 [DEBUG] clck_gen.py:102 IND CLOCK 26010
2024-10-24 09:22:20 [DEBUG] clck_gen.py:102 IND CLOCK 26112
2024-10-24 09:22:21 [DEBUG] clck_gen.py:102 IND CLOCK 26214
2024-10-24 09:22:21 [DEBUG] clck_gen.py:102 IND CLOCK 26316
2024-10-24 09:22:22 [DEBUG] clck_gen.py:102 IND CLOCK 26418
2024-10-24 09:22:22 [DEBUG] clck_gen.py:102 IND CLOCK 26520
2024-10-24 09:22:23 [DEBUG] clck_gen.py:102 IND CLOCK 26622
2024-10-24 09:22:23 [DEBUG] clck_gen.py:102 IND CLOCK 26724
2024-10-24 09:22:24 [DEBUG] clck_gen.py:102 IND CLOCK 26826
2024-10-24 09:22:24 [DEBUG] clck_gen.py:102 IND CLOCK 26928
2024-10-24 09:22:25 [DEBUG] clck_gen.py:102 IND CLOCK 27030
2024-10-24 09:22:25 [DEBUG] clck_gen.py:102 IND CLOCK 27132
2024-10-24 09:22:26 [DEBUG] clck_gen.py:102 IND CLOCK 27234
2024-10-24 09:22:26 [DEBUG] clck_gen.py:102 IND CLOCK 27336
2024-10-24 09:22:27 [DEBUG] clck_gen.py:102 IND CLOCK 27438
2024-10-24 09:22:27 [DEBUG] clck_gen.py:102 IND CLOCK 27540
2024-10-24 09:22:27 [DEBUG] clck_gen.py:102 IND CLOCK 27642
2024-10-24 09:22:28 [DEBUG] clck_gen.py:102 IND CLOCK 27744
2024-10-24 09:22:28 [DEBUG] clck_gen.py:102 IND CLOCK 27846
2024-10-24 09:22:29 [DEBUG] clck_gen.py:102 IND CLOCK 27948
2024-10-24 09:22:29 [DEBUG] clck_gen.py:102 IND CLOCK 28050
2024-10-24 09:22:30 [DEBUG] clck_gen.py:102 IND CLOCK 28152
2024-10-24 09:22:30 [DEBUG] clck_gen.py:102 IND CLOCK 28254
2024-10-24 09:22:31 [DEBUG] clck_gen.py:102 IND CLOCK 28356
2024-10-24 09:22:31 [DEBUG] clck_gen.py:102 IND CLOCK 28458
2024-10-24 09:22:32 [DEBUG] clck_gen.py:102 IND CLOCK 28560
2024-10-24 09:22:32 [DEBUG] clck_gen.py:102 IND CLOCK 28662
2024-10-24 09:22:33 [DEBUG] clck_gen.py:102 IND CLOCK 28764
2024-10-24 09:22:33 [DEBUG] clck_gen.py:102 IND CLOCK 28866
2024-10-24 09:22:34 [DEBUG] clck_gen.py:102 IND CLOCK 28968
2024-10-24 09:22:34 [DEBUG] clck_gen.py:102 IND CLOCK 29070
2024-10-24 09:22:34 [DEBUG] clck_gen.py:102 IND CLOCK 29172
2024-10-24 09:22:35 [DEBUG] clck_gen.py:102 IND CLOCK 29274
2024-10-24 09:22:35 [DEBUG] clck_gen.py:102 IND CLOCK 29376
2024-10-24 09:22:36 [DEBUG] clck_gen.py:102 IND CLOCK 29478
2024-10-24 09:22:36 [DEBUG] clck_gen.py:102 IND CLOCK 29580
2024-10-24 09:22:37 [DEBUG] clck_gen.py:102 IND CLOCK 29682
2024-10-24 09:22:37 [DEBUG] clck_gen.py:102 IND CLOCK 29784
2024-10-24 09:22:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:22:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:22:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:22:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:22:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:22:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:22:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:22:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:22:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:22:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:22:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:22:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:22:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:22:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:22:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:22:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:22:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:22:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:22:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:22:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:22:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:22:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:22:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:22:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:22:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:22:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:22:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:22:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:22:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:22:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:22:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:22:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:22:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:22:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:22:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:22:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:22:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:22:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:22:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:22:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:22:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:22:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:22:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:22:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:22:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:22:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:22:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:22:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:22:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:22:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:22:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:22:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:22:48 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:22:48 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:22:48 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:22:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:22:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:22:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:22:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:22:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:22:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:22:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:22:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:22:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:22:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:22:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:22:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:22:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:22:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:22:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:22:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:22:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:22:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:22:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:22:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:22:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:22:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:22:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:22:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:22:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:22:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:22:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:22:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:22:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:22:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:22:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:22:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:22:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:22:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:22:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:22:50 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:22:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:22:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:22:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:22:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:22:51 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:22:51 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:22:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:22:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:22:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:22:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:22:52 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:22:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:22:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:22:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:22:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:22:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:22:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:22:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:22:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:22:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:22:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:22:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:22:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:22:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:22:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:22:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:22:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:22:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:22:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:22:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:22:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:22:52 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:22:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:22:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:22:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:22:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:22:53 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:22:53 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:22:54 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:22:54 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:22:55 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:22:55 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:22:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:22:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:22:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:22:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:22:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:22:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:22:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:22:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:22:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:22:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:22:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:22:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:22:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:22:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:22:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:22:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:22:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:22:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:22:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:22:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:22:56 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:22:56 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:22:56 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:22:57 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:22:57 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:22:58 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:22:58 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:22:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:22:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:22:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:22:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:22:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:22:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:22:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:22:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:22:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:22:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:22:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:22:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:22:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:22:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:22:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:23:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:23:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:23:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:23:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:23:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:23:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:23:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:23:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:23:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:23:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:23:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:23:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:23:04 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:23:04 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:23:04 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:23:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:23:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:23:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:23:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:23:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:23:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:23:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:23:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:23:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:23:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:23:06 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:23:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:23:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:23:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:23:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:23:06 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:23:07 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:23:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:23:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:23:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:23:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:23:07 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:23:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:23:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:23:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:23:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:23:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:23:08 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:23:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:23:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:23:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:23:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:23:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:23:09 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:23:09 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:23:10 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:23:10 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:23:11 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:23:11 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:23:12 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:23:12 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:23:13 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:23:13 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:23:14 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:23:14 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:23:14 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:23:15 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:23:15 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:23:16 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:23:16 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:23:17 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:23:17 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:23:18 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:23:18 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:23:19 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:23:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:23:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:23:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:23:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:23:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:23:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:23:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:23:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:23:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:23:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:23:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:23:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:23:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:23:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:23:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:23:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:23:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:23:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:23:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:23:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:23:19 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:23:20 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:23:20 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:23:21 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:23:21 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:23:22 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:23:22 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:23:22 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:23:23 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:23:23 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:23:24 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:23:24 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:23:25 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:23:25 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 09:23:26 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 09:23:26 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 09:23:27 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 09:23:27 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 09:23:28 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 09:23:28 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 09:23:29 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 09:23:29 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 09:23:30 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 09:23:30 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 09:23:30 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 09:23:31 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 09:23:31 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 09:23:32 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 09:23:32 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 09:23:33 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 09:23:33 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 09:23:34 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 09:23:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:23:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:23:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:23:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:23:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:23:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:23:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:23:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:23:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:23:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:23:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:23:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:23:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:23:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:23:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:23:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:23:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:23:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:23:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:23:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:23:34 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 09:23:35 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 09:23:35 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 09:23:36 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 09:23:36 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 09:23:37 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 09:23:37 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 09:23:37 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 09:23:38 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 09:23:38 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 09:23:39 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 09:23:39 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 09:23:40 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 09:23:40 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-24 09:23:41 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-24 09:23:41 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-24 09:23:42 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-24 09:23:42 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-24 09:23:43 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-24 09:23:43 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-24 09:23:44 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-24 09:23:44 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-24 09:23:45 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-24 09:23:45 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-24 09:23:45 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-24 09:23:46 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-24 09:23:46 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-24 09:23:47 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-24 09:23:47 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-24 09:23:48 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-24 09:23:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:23:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:23:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:23:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:23:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:23:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:23:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:23:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:23:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:23:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:23:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:23:48 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-24 09:23:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:23:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:23:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:23:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:23:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:23:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:23:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:23:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:23:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:23:49 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-24 09:23:49 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-24 09:23:50 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-24 09:23:50 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-24 09:23:51 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-24 09:23:51 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-24 09:23:52 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-24 09:23:52 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-24 09:23:52 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-24 09:23:53 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-24 09:23:53 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-24 09:23:54 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-24 09:23:54 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-24 09:23:55 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-24 09:23:55 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-24 09:23:56 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-24 09:23:56 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-24 09:23:57 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-24 09:23:57 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-24 09:23:58 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-24 09:23:58 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-24 09:23:59 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-24 09:23:59 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-24 09:24:00 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-24 09:24:00 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-24 09:24:00 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-24 09:24:01 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-24 09:24:01 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-24 09:24:02 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-24 09:24:02 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-24 09:24:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:24:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:24:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:24:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:24:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:24:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:24:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:24:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:24:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:24:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:24:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:24:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:24:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:24:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:24:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:24:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:24:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:24:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:24:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:24:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:24:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:24:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:24:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:24:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:24:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:24:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:24:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:24:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:24:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:24:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:24:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:24:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:24:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:24:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:24:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:24:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:24:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:24:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:24:13 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:24:13 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:24:13 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:24:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:24:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:24:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:24:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:24:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:24:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:24:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:24:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:24:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:24:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:24:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:24:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:24:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:24:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:24:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:24:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:24:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:24:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:24:17 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:24:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:24:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:24:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:24:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:24:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:24:18 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:24:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:24:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:24:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:24:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:24:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:24:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:24:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:24:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:24:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:24:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:24:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:24:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:24:22 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:24:22 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:24:23 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:24:23 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:24:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:24:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:24:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:24:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:24:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:24:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:24:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:24:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:24:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:24:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:24:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:24 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:24:24 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:24:25 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:24:25 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:24:26 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:24:26 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:24:26 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:24:27 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:24:27 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:24:28 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:24:28 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:24:29 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:24:29 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:24:30 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:24:30 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:24:31 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:24:31 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:24:32 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:24:32 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:24:33 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:24:33 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:24:33 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:24:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:24:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:24:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:24:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:24:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:24:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:24:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:24:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:34 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:24:34 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 09:24:35 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 09:24:35 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 09:24:36 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 09:24:36 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 09:24:37 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 09:24:37 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 09:24:38 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 09:24:38 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 09:24:39 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 09:24:39 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 09:24:40 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 09:24:40 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 09:24:41 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 09:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:24:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:24:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:24:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:24:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:24:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:24:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:24:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:24:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:41 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 09:24:41 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 09:24:42 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 09:24:42 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 09:24:43 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 09:24:43 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 09:24:44 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 09:24:44 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 09:24:45 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 09:24:45 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 09:24:46 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 09:24:46 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 09:24:47 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 09:24:47 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 09:24:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:24:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:24:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:24:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:24:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:24:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:24:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:24:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:24:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:24:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=7550 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:24:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:24:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:24:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:24:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:24:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:24:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:24:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:24:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:24:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:24:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:24:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:24:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:24:53 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:24:53 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:24:53 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:24:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:24:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:24:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:24:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:24:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:24:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:24:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:24:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:24:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:24:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:24:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:24:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:24:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:24:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:24:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:24:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:24:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:24:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:24:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:24:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:24:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:24:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:24:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:24:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:24:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:24:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:24:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:24:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:24:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:24:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:24:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:24:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:24:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:24:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:24:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:24:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:24:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:24:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:24:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:25:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:25:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:25:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:25:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:25:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:25:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:25:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:25:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:25:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:25:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:25:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:25:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:25:01 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:25:01 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:01 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:25:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:25:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:25:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:25:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:25:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:25:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:25:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:25:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:25:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:25:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:25:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:25:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:25:04 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:25:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:25:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:25:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:25:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:25:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:25:05 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:25:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:25:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:25:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:25:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:25:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:25:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:25:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:25:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:25:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:25:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:25:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:25:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:25:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:25:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:25:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:25:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:25:08 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:25:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:25:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:25:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:25:09 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:25:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:25:10 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:25:10 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:25:11 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:25:11 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:25:12 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:25:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:25:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:25:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:12 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:25:13 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:25:13 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:25:13 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:25:14 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:25:14 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:25:15 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:25:15 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:25:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:25:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:25:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:25:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:25:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:25:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:25:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:25:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:25:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:25:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:25:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:25:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:25:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:25:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:25:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:25:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:25:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:25:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:25:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:25:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:25:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:25:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:25:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:25:21 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:25:21 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:21 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:25:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:25:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:25:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:25:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:25:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:25:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:25:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:25:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:25:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:25:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:25:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:25:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:25:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:25:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:25:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:25:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:25:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:25:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:25:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:25:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:25:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:25:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:25:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:25:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:25:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:25:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:25:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:25:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:25:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:25:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:25:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:25:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:25:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:25:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:25:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:25:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:25:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:25:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:25:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:25:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:25:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:25:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:25:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:25:30 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:25:30 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:25:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:30 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:25:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:25:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:25:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:25:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:25:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:25:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:25:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:25:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:25:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:25:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:25:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:25:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:25:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:25:31 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:25:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:25:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:25:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:25:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:25:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:25:32 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:25:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:25:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:25:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:25:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:25:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:25:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:25:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:25:33 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:25:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:25:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:25:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:25:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:25:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:25:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:25:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:25:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:25:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:25:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:25:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:25:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:37 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:25:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:25:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:25:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:38 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:25:38 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:25:39 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:25:39 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:25:39 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:25:40 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:25:40 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:25:41 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:25:41 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:25:42 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:25:42 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:25:43 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:25:43 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:25:44 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:25:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:25:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:25:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:44 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:25:45 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:25:45 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:25:46 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:25:46 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:25:46 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:25:47 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:25:47 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:25:48 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:25:48 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:25:49 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:25:49 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:25:50 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:25:50 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:25:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:25:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:25:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:25:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:25:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:25:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:25:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:25:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:25:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:25:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:25:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:25:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:25:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:25:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:25:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:25:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:25:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:25:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:25:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:25:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:25:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:25:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:25:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:25:56 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:25:56 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:56 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:25:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:25:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:25:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:25:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:25:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:25:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:25:57 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:25:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:25:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:25:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:25:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:25:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:25:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:25:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:25:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:25:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:25:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:25:58 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:25:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:25:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:25:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:25:58 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:25:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:25:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:25:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:25:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:25:59 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:25:59 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:26:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:26:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:26:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:26:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:26:00 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:26:00 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:26:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:26:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:26:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:26:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:26:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:26:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:26:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:26:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:26:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:26:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:26:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:26:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:26:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:26:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:26:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:26:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:26:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:26:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:26:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:26:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:26:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:26:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:26:01 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:26:01 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:26:02 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:26:02 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:26:03 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:26:03 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:26:04 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:26:04 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:26:05 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:26:05 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:26:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:26:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:26:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:26:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:26:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:26:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:26:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:26:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:26:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:26:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:26:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:26:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:26:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:26:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:26:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:26:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:26:05 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:26:06 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:26:06 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:26:07 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:26:07 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:26:08 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:26:08 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:26:09 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:26:09 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:26:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:26:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:26:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:26:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:26:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:26:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:26:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:26:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:26:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:26:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:26:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:26:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:26:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:26:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:26:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:26:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:26:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:26:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:26:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:26:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:26:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:26:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:26:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:26:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:26:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:26:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:26:15 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:26:15 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:15 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:26:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:26:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:26:16 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=405 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:26:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:26:16 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=405 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:26:16 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=405 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:26:16 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=405 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:26:16 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=405 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:26:16 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=405 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:26:16 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=405 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:26:16 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=405 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:26:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:26:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:26:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:26:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:26:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:26:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:26:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:26:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:26:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:26:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:26:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:26:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:26:22 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:26:22 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:22 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:26:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:26:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:26:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:26:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:23 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:26:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:26:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:26:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:26:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:26:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:26:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:26:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:26:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:26:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:26:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:26:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:26:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:26:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:26:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:26:29 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:29 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:26:29 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:26:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:26:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:26:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:26:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:30 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:30 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:26:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:26:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:26:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:26:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:26:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:26:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:26:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:26:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:26:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:26:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:26:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:26:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:26:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:26:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:26:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:26:36 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:26:36 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:26:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:36 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:26:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:26:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:26:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:26:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:26:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:26:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:26:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:26:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:26:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:26:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:26:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:26:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:26:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:26:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:26:37 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=406 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:26:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:26:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:26:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:26:37 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=406 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:26:37 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=406 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:26:37 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=406 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:26:37 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=406 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:26:37 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=406 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:26:37 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=406 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:26:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:26:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:26:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:26:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:26:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:26:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:26:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:26:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:26:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:26:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:26:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:26:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:26:43 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:26:43 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:26:43 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:26:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:26:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:26:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:26:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:26:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:26:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:26:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:26:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:26:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:26:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:26:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:26:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:26:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:26:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:26:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:26:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:26:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:26:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:26:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:26:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:26:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:26:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:26:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:26:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:26:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:26:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:26:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:26:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:26:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:26:50 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:26:50 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:26:50 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:26:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:26:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:26:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:26:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:26:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:26:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:26:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:26:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:26:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:26:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:26:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:26:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:26:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:26:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:26:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:26:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:26:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:26:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:26:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:26:57 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:26:57 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:26:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:57 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:26:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:26:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:26:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:26:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:26:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:26:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:26:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:26:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:26:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:26:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:26:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:26:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:26:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:26:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:26:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:26:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:26:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:26:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=411 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:26:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:26:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:26:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=411 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:26:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=411 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:26:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=411 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:26:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=411 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:26:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=411 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:26:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=411 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:26:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=411 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:27:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:27:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:27:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:27:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:27:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:27:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:27:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:27:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:27:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:27:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:27:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:27:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:27:04 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:27:04 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:27:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:27:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:27:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:27:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:27:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:27:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:27:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:27:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:27:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:27:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:27:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:27:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:27:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:27:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:27:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:27:09 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:27:09 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:27:09 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:27:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:27:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:27:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:27:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:27:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:27:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:27:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=158 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=158 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=158 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=158 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=158 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=158 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=158 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=158 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:27:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:27:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:27:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:27:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:27:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:27:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:27:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:27:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:27:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:27:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:27:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:27:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:27:15 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:27:15 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:27:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:27:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:27:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=149 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=149 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=149 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=149 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:27:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:27:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:27:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:27:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:27:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:27:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:27:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:27:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:27:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:27:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:27:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:27:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:27:21 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:27:21 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:27:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:27:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:27:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:27:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:27:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:27:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:27:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:27:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:27:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:27:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:27:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:27:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:27:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:27:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:27:27 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:27:27 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:27:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:27:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:27:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:27:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:27:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:27:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:27:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:27:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:27:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:27:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:27:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:27:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:27:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:27:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:27:32 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:27:32 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:27:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:27:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:27:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:27:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:27:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:27:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:27:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:27:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:27:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:27:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:27:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:27:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:27:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:27:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:27:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:27:38 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:27:38 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:27:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:27:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:27:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=148 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=148 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=148 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=148 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:27:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:27:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:27:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:27:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:27:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:27:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:27:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:27:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:27:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:27:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:27:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:27:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:27:44 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:27:44 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:27:44 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:27:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:27:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:27:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:27:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:27:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:27:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:27:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:27:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:27:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:27:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:27:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:27:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:27:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:27:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:27:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:27:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:27:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:27:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:27:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:27:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:27:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:27:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:27:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:27:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:27:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:27:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:27:47 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:27:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:27:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:27:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:27:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:27:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:27:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:27:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:27:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:27:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:27:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=868 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=868 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=868 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=868 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=868 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=868 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=868 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=868 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:27:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:27:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:27:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:27:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:27:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:27:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:27:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:27:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:27:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:27:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:27:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:27:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:27:53 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:27:53 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:27:53 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:27:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:27:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:27:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:27:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:27:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:27:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:27:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:27:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:27:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:27:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:27:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:27:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:27:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:27:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:27:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:27:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:27:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:27:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:27:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:27:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:27:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:27:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:27:59 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:27:59 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:59 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:27:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:27:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:27:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:27:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:27:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:27:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:28:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:28:00 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:28:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:28:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:28:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:28:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:28:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:28:01 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:28:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:28:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:28:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:28:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:28:02 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:28:02 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:28:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:28:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:28:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:28:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:28:03 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:28:03 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:28:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:28:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:28:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:28:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:28:04 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:28:04 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:28:04 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:28:05 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:28:05 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:28:06 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:28:06 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:28:07 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:28:07 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:28:08 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:28:08 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:28:09 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:28:09 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:28:10 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:28:10 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:28:11 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:28:11 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:28:11 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:28:12 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:28:12 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:28:13 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:28:13 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:28:14 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:28:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:28:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:28:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:28:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:28:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:28:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:28:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:28:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:28:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:28:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:28:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:28:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:28:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:28:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:28:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:28:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:28:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:28:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:28:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:28:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:28:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:28:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:28:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:28:14 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3440 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:14 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3440 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:14 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3440 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:14 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3440 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:14 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3440 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:14 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3440 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:14 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3440 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:28:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:28:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:28:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:28:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:28:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:28:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:28:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:28:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:28:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:28:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:28:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:28:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:28:20 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:28:20 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:28:20 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:28:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:28:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:28:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:28:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:28:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:28:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:28:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:28:20 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=196 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:28:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:28:20 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=196 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:20 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=196 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:20 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=196 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:20 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=196 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:20 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=196 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:20 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=196 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:20 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=196 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:28:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:28:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:28:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:28:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:28:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:28:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:28:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:28:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:28:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:28:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:28:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:28:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:28:26 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:28:26 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:28:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:28:26 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:28:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:28:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:28:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:28:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:28:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:28:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:28:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:28:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:28:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:28:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:28:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:28:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:28:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:28:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:28:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:28:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:28:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:28:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:28:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:28:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:28:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:28:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:28:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:28:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:28:27 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:28:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:28:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:28:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:28:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:28:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:28:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:28:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:28:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:28:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:28:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:28:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:28:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:28:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:28:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:28:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:28:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:28:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:28:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:28:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:28:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:28:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:28:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:28:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=575 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:28:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=575 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=575 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=575 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=575 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=575 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=575 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=575 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:28:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:28:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:28:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:28:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:28:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:28:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:28:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:28:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:28:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:28:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:28:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:28:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:28:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:28:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:28:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:28:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:28:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:28:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:28:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:28:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:28:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:28:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:28:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:28:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:28:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:28:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:28:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:28:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:28:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:28:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:28:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:28:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:28:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:28:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:28:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:28:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:28:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:28:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:28:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:28:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:28:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:28:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:28:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:28:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:28:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:28:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:28:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:28:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:28:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:28:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:28:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:28:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:28:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:28:51 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.90.20:5700'
2024-10-24 09:28:51 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.90.20:5802)
2024-10-24 09:28:51 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.90.20:5801)
2024-10-24 09:28:51 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.90.22:6700'
2024-10-24 09:28:51 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.90.22:6802)
2024-10-24 09:28:51 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.90.22:6801)
2024-10-24 09:28:51 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.90.20:5700/1'
2024-10-24 09:28:51 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.90.20:5804)
2024-10-24 09:28:51 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.90.20:5803)
2024-10-24 09:28:51 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.90.20:5700/2'
2024-10-24 09:28:51 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.90.20:5806)
2024-10-24 09:28:51 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.90.20:5805)
2024-10-24 09:28:51 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.90.20:5700/3'
2024-10-24 09:28:51 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.90.20:5808)
2024-10-24 09:28:51 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.90.20:5807)
2024-10-24 09:28:51 [INFO] fake_trx.py:423 Init complete
2024-10-24 09:28:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:28:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:28:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:28:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:28:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:28:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:29:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:29:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:29:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:29:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:29:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:29:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:29:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:29:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:29:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:29:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:29:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:29:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:29:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:29:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:29:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:29:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:29:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:29:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:29:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:29:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:29:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:29:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:29:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:29:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:29:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:29:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:29:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:29:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:29:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:29:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:29:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:29:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:29:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:29:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:29:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:29:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:29:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:29:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:29:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:29:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:29:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:29:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:29:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 0 -> 1
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:29:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 0 -> 1
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:29:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 0 -> 1
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:29:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 0 -> 1
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:29:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:29:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:29:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:29:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:29:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:29:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:29:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:30:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:30:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:30:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:30:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:30:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:30:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:30:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:30:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:30:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:30:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:30:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:30:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:30:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:30:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:30:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:30:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:30:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:30:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:30:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:30:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:30:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:30:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:30:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:30:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:30:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:30:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:30:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:30:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:30:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:30:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:30:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:30:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:30:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:30:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:30:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:30:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:30:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:30:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:30:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:30:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:30:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:30:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:30:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:30:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:30:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:30:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:30:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:30:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:30:31 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.90.20:5700'
2024-10-24 09:30:31 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.90.20:5802)
2024-10-24 09:30:31 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.90.20:5801)
2024-10-24 09:30:31 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.90.22:6700'
2024-10-24 09:30:31 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.90.22:6802)
2024-10-24 09:30:31 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.90.22:6801)
2024-10-24 09:30:31 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.90.20:5700/1'
2024-10-24 09:30:31 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.90.20:5804)
2024-10-24 09:30:31 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.90.20:5803)
2024-10-24 09:30:31 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.90.20:5700/2'
2024-10-24 09:30:31 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.90.20:5806)
2024-10-24 09:30:31 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.90.20:5805)
2024-10-24 09:30:31 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.90.20:5700/3'
2024-10-24 09:30:31 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.90.20:5808)
2024-10-24 09:30:31 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.90.20:5807)
2024-10-24 09:30:31 [INFO] fake_trx.py:423 Init complete
2024-10-24 09:30:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:30:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:30:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:30:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:30:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:30:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:30:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:30:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 0 -> 1
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:30:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:30:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 0 -> 1
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:30:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:30:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 0 -> 1
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:30:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:30:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 0 -> 1
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:30:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:30:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:30:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:30:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:30:36 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:36 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:30:36 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:30:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:30:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:30:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:30:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:30:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:30:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:30:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:30:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:30:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:30:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:30:38 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:30:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:30:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:30:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:30:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:30:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:30:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:30:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:30:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:30:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:30:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:30:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:30:39 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-24 09:30:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:30:40 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:30:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:40 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:30:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:30:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:30:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:30:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:30:40 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-24 09:30:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:40 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:41 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:30:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:41 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:30:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:41 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:42 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:30:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:30:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:30:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:30:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:30:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:42 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:30:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:43 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:30:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:30:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:30:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:30:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:43 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:30:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:30:43 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:30:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:44 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:30:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:44 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:30:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:30:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:30:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:44 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:30:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:30:44 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:30:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:45 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:30:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:30:45 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:30:45 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:45 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:30:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:30:45 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:45 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:45 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:30:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:30:45 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:46 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:46 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:30:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:30:46 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:46 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:46 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:30:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:30:46 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:46 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:30:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:46 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:30:46 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:47 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:30:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:30:47 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:30:47 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:47 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:30:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:30:47 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:30:47 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:30:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:48 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:30:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:30:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:30:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:30:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:30:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:30:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:30:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2752 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:30:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:30:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:30:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2752 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:30:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2752 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:30:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2752 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:30:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2752 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:30:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2752 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:30:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2752 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:30:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2752 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:30:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:30:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:30:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:30:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:30:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:30:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:30:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:30:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:30:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:30:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:30:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:30:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:30:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:30:53 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:30:53 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:53 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:30:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
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2024-10-24 09:30:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:30:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
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2024-10-24 09:30:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:30:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:30:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:30:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
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2024-10-24 09:30:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
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2024-10-24 09:30:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
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2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
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2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
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2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:30:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:30:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:30:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:31:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:31:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:31:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:31:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:31:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:31:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:31:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:31:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:31:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:31:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:31:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:31:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:31:01 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:31:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:01 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:31:01 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:31:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:31:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:31:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:31:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:31:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:31:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:31:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:31:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:31:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:31:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:31:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:31:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:31:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:31:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:31:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:31:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:31:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:31:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:31:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:31:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:31:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:31:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:31:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:31:06 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:31:06 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:06 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:31:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:31:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:31:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:31:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:31:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:31:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:31:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:31:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:31:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:31:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:31:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:31:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:31:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:31:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:31:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:31:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:31:12 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:31:12 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:12 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:31:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:31:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:31:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:31:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:31:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:31:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:31:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:31:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:31:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:31:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:31:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:31:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:31:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:31:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:31:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:31:18 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:31:18 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:31:18 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:31:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:31:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:31:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:31:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:31:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:31:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:31:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:31:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:31:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:31:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:31:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:31:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:31:19 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:31:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:31:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:31:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:31:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:31:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:31:20 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:31:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:31:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:31:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:31:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:31:21 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:31:21 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:31:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:31:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:31:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:31:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:31:22 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:31:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:31:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:31:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:31:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:31:22 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:31:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:31:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:31:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:31:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:31:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:31:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:31:23 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:31:23 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:31:23 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:31:24 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:31:24 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:31:25 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:31:25 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:31:26 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:31:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:26 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:31:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:31:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:31:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:31:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:31:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:31:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:31:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:27 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:31:27 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:31:28 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:31:28 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:31:29 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:31:29 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:31:30 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:31:30 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:31:30 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:31:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:31:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:31:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:31:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:31:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:31:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:31:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:31 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:31:31 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:31:32 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:31:32 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:31:33 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:31:33 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:31:34 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:31:34 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:31:35 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:31:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:31:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:31:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:31:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:31:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:31:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:31:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:35 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:31:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:36 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:31:36 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:31:37 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:31:37 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:31:38 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:31:38 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:31:38 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:31:39 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 09:31:39 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 09:31:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:31:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:31:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:31:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:31:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:31:40 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-24 09:31:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:40 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 09:31:40 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 09:31:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:41 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 09:31:41 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 09:31:42 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 09:31:42 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 09:31:43 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 09:31:43 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 09:31:44 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 09:31:44 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 09:31:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:44 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:31:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:31:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:31:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:31:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:31:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:31:44 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-24 09:31:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:45 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 09:31:45 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 09:31:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:46 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 09:31:46 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 09:31:46 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 09:31:47 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 09:31:47 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 09:31:48 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 09:31:48 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 09:31:49 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 09:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:49 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:31:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:31:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:31:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:31:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:31:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:49 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 09:31:50 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 09:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:50 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 09:31:51 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 09:31:51 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 09:31:52 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 09:31:52 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 09:31:53 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 09:31:53 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 09:31:53 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 09:31:54 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-24 09:31:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:31:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:31:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:31:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:31:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:31:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:31:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:54 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-24 09:31:55 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-24 09:31:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:55 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-24 09:31:56 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-24 09:31:56 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-24 09:31:57 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-24 09:31:57 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-24 09:31:58 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-24 09:31:58 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-24 09:31:59 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-24 09:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:31:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:31:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:31:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:31:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:31:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:31:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:31:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:31:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:31:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:31:59 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-24 09:32:00 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-24 09:32:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:00 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-24 09:32:01 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-24 09:32:01 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-24 09:32:01 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-24 09:32:02 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-24 09:32:02 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-24 09:32:03 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-24 09:32:03 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-24 09:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:32:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:32:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:32:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:04 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:32:04 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:04 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-24 09:32:04 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-24 09:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:05 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-24 09:32:05 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-24 09:32:06 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-24 09:32:06 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-24 09:32:07 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-24 09:32:07 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-24 09:32:08 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-24 09:32:08 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-24 09:32:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:08 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:32:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:32:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:32:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:32:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:32:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:32:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:32:08 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:32:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:09 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-24 09:32:09 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-24 09:32:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:09 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-24 09:32:10 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-24 09:32:10 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-24 09:32:11 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-24 09:32:11 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-24 09:32:12 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-24 09:32:12 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-24 09:32:13 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-24 09:32:13 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-24 09:32:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:13 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:32:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:32:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:32:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:32:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:32:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:32:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:13 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:32:13 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:32:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:14 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-24 09:32:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:14 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-24 09:32:15 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-24 09:32:15 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-24 09:32:16 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-24 09:32:16 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-24 09:32:16 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-24 09:32:17 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-24 09:32:17 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-24 09:32:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:18 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:32:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:32:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:32:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:32:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:32:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:32:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:18 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:32:18 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:32:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:18 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-24 09:32:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:18 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-24 09:32:19 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-24 09:32:19 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-24 09:32:20 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-24 09:32:20 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-24 09:32:21 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-24 09:32:21 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-24 09:32:22 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-24 09:32:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:22 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:32:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:32:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:32:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:32:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:32:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:32:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:22 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-24 09:32:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:32:22 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:32:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:23 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-24 09:32:23 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-24 09:32:24 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-24 09:32:24 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-24 09:32:24 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-24 09:32:25 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-24 09:32:25 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-24 09:32:26 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-24 09:32:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:26 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:32:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:32:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:32:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:32:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:32:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:32:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:32:26 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:32:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:26 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-24 09:32:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:27 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-24 09:32:27 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-24 09:32:28 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-24 09:32:28 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-24 09:32:29 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-24 09:32:29 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-24 09:32:30 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-24 09:32:30 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-24 09:32:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:31 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:32:31 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-24 09:32:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:32:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:32:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:32:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:32:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:32:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:32:31 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:32:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:31 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-24 09:32:31 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-24 09:32:32 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-24 09:32:32 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-24 09:32:33 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-24 09:32:33 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-24 09:32:34 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-24 09:32:34 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-24 09:32:35 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-24 09:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:35 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:32:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:32:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:32:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:32:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:35 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:32:35 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:35 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-24 09:32:36 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-24 09:32:36 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-24 09:32:37 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-24 09:32:37 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-24 09:32:38 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-24 09:32:38 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-24 09:32:39 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-24 09:32:39 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-24 09:32:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:39 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:32:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:32:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:32:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:32:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:32:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:32:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:32:39 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:32:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:39 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-24 09:32:40 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-24 09:32:40 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-24 09:32:41 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-24 09:32:41 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-24 09:32:42 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-24 09:32:42 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-24 09:32:43 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-24 09:32:43 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-24 09:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:43 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:32:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:32:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:32:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:32:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:32:43 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:44 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-24 09:32:44 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-24 09:32:45 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-24 09:32:45 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-24 09:32:46 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2024-10-24 09:32:46 [DEBUG] clck_gen.py:102 IND CLOCK 19278
2024-10-24 09:32:46 [DEBUG] clck_gen.py:102 IND CLOCK 19380
2024-10-24 09:32:47 [DEBUG] clck_gen.py:102 IND CLOCK 19482
2024-10-24 09:32:47 [DEBUG] clck_gen.py:102 IND CLOCK 19584
2024-10-24 09:32:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:48 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:32:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:32:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:32:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:32:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:32:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:32:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:32:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:32:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:32:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:32:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:32:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:32:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=19637 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:32:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=19637 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:32:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=19637 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:32:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=19637 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:32:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=19637 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:32:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=19637 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:32:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=19637 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:32:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=19637 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:32:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:32:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:32:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:32:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:32:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:32:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:32:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:32:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:32:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:32:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:32:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:32:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:32:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:32:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:32:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:32:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:32:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:32:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:32:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:32:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:32:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:32:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:32:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:32:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:32:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:32:58 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:32:58 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:58 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:32:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:32:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:32:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:32:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:32:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:32:59 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:32:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:00 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:33:00 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:00 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:01 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:01 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:01 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:02 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:02 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:33:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:33:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:33:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:33:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:33:03 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:33:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:03 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:03 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:33:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:03 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:04 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:04 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:04 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:04 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:04 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:04 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:04 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:05 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:05 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:05 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:05 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:05 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:05 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:05 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:06 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:06 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:06 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:06 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:06 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:06 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:07 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:07 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:07 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:07 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:07 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:07 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:08 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:33:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:33:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:33:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:33:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:33:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:33:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:33:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:33:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:33:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:33:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:33:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:33:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:33:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:33:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:33:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:33:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:33:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:33:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:33:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:33:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:33:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:33:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:33:13 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:33:13 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:13 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:33:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:33:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:33:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:33:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:33:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:33:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:33:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:33:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:33:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:33:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:33:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:33:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:33:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:33:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:33:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:33:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:33:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:33:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:33:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:33:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:33:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:33:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:33:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:33:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:33:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:33:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:33:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:33:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:20 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-24 09:33:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:33:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:33:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:33:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:21 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:21 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-24 09:33:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:22 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:33:22 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:33:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:22 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:33:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:23 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:33:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:23 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:33:23 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:33:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:24 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:33:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:24 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:33:25 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:25 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:26 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:33:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:33:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:26 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:33:27 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:33:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:27 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:33:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:28 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:33:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:28 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:28 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:33:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:28 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:33:29 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:33:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:29 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:33:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:29 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:29 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:33:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:30 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:33:30 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:33:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:30 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:33:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:31 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:31 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:33:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:31 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:33:31 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:33:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:32 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:33:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:32 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:32 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:33:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:32 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:33:33 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:33:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:33 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:33:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:33 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:33 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:33:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:34 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:33:34 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 09:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:35 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 09:33:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:35 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:35 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:35 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:33:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:35 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 09:33:36 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 09:33:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:36 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 09:33:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:36 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:36 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:33:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:37 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 09:33:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:37 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 09:33:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:37 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:37 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:33:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:37 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 09:33:38 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 09:33:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:38 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 09:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:39 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:39 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 09:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:39 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:33:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:39 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 09:33:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:40 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 09:33:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:40 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:40 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 09:33:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:33:40 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:33:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:41 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 09:33:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:41 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 09:33:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:42 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:33:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:33:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:33:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:33:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:33:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:33:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:33:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:33:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:33:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:33:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:33:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:33:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6322 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:33:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6322 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:33:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6322 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:33:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6322 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:33:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6322 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:33:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6322 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:33:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6322 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:33:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6322 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:33:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:33:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:33:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:33:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:33:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:33:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:33:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:33:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:33:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:33:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:33:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:33:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:33:47 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:33:47 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:47 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:33:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:33:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:33:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:33:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:33:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:33:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:33:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:33:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:33:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:33:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:33:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:33:50 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:33:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:33:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:33:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:33:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:33:50 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:33:50 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:33:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:33:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:33:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:33:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:33:51 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:51 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:33:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:33:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:33:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:33:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:33:52 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:33:52 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:33:53 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:33:53 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:33:54 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:33:54 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:33:55 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:33:55 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:33:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:56 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:33:56 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:33:57 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:33:57 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:33:58 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:33:58 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:33:58 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:33:59 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:33:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:33:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:33:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:33:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:33:59 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:33:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:33:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:33:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:33:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:00 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:34:00 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:34:01 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:34:01 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:34:02 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:34:02 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:34:03 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:34:03 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:34:04 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:34:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:34:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:34:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:34:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:34:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:34:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:04 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:34:05 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:34:05 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:34:06 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:34:06 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:34:06 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:34:07 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:34:07 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:34:08 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:34:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:34:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:34:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:34:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:34:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:34:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:08 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 09:34:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:34:08 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-24 09:34:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:09 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 09:34:09 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 09:34:10 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 09:34:10 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 09:34:11 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 09:34:11 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 09:34:12 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 09:34:12 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 09:34:13 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 09:34:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:13 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:34:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:34:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:34:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:34:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:34:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:34:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:13 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:34:13 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-24 09:34:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:13 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 09:34:14 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 09:34:14 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 09:34:14 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 09:34:15 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 09:34:15 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 09:34:16 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 09:34:16 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 09:34:17 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 09:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:17 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:34:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:34:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:34:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:34:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:34:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:34:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:34:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:17 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 09:34:18 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 09:34:18 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 09:34:19 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 09:34:19 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 09:34:20 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 09:34:20 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 09:34:21 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 09:34:21 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 09:34:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:34:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:34:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:34:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:34:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:34:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:34:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:34:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:22 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 09:34:22 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 09:34:22 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 09:34:23 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 09:34:23 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-24 09:34:24 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-24 09:34:24 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-24 09:34:25 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-24 09:34:25 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-24 09:34:26 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-24 09:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:34:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:34:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:34:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:34:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:26 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-24 09:34:27 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-24 09:34:27 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-24 09:34:28 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-24 09:34:28 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-24 09:34:29 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-24 09:34:29 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-24 09:34:29 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-24 09:34:30 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-24 09:34:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:34:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:34:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:34:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:34:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:34:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:34:30 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:34:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:30 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-24 09:34:31 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-24 09:34:31 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-24 09:34:32 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-24 09:34:32 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-24 09:34:33 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-24 09:34:33 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-24 09:34:34 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-24 09:34:34 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-24 09:34:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:34 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:34:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:34:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:34:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:34:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:34:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:34:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:34 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:34:34 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:34:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:35 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-24 09:34:35 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-24 09:34:36 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-24 09:34:36 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-24 09:34:37 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-24 09:34:37 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-24 09:34:37 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-24 09:34:38 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-24 09:34:38 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-24 09:34:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:39 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:34:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:34:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:34:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:34:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:34:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:34:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:34:39 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:34:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:39 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-24 09:34:39 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-24 09:34:40 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-24 09:34:40 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-24 09:34:41 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-24 09:34:41 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-24 09:34:42 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-24 09:34:42 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-24 09:34:43 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-24 09:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:43 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:34:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:34:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:34:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:34:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:34:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:34:43 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:34:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:43 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-24 09:34:44 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-24 09:34:44 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-24 09:34:44 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-24 09:34:45 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-24 09:34:45 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-24 09:34:46 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-24 09:34:46 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-24 09:34:47 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-24 09:34:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:47 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:34:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:34:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:34:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:34:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:34:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:34:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:34:47 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:34:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:47 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-24 09:34:48 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-24 09:34:48 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-24 09:34:49 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-24 09:34:49 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-24 09:34:50 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-24 09:34:50 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-24 09:34:51 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-24 09:34:51 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-24 09:34:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:51 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:34:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:34:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:34:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:34:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:34:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:34:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:34:51 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:34:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:52 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-24 09:34:52 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-24 09:34:52 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-24 09:34:53 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-24 09:34:53 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-24 09:34:54 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-24 09:34:54 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-24 09:34:55 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-24 09:34:55 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-24 09:34:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:55 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:34:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:34:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:34:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:34:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:34:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:56 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:34:56 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:34:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:56 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-24 09:34:56 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-24 09:34:57 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-24 09:34:57 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-24 09:34:58 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-24 09:34:58 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-24 09:34:59 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-24 09:34:59 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-24 09:34:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:59 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:34:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:34:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:34:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:34:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:34:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:34:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:34:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:34:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:34:59 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:34:59 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:34:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:34:59 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-24 09:35:00 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-24 09:35:00 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-24 09:35:01 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-24 09:35:01 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-24 09:35:02 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-24 09:35:02 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-24 09:35:03 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-24 09:35:03 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-24 09:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:35:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:35:04 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:35:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:35:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:35:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:35:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:35:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:35:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:35:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:35:04 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-24 09:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:04 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:35:04 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:35:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:04 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-24 09:35:05 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-24 09:35:05 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-24 09:35:06 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-24 09:35:06 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-24 09:35:07 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-24 09:35:07 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-24 09:35:07 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-24 09:35:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:35:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:35:08 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:35:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:35:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:35:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:35:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:35:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:35:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:35:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:35:08 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-24 09:35:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:35:08 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:35:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:08 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-24 09:35:09 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-24 09:35:09 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-24 09:35:10 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-24 09:35:10 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-24 09:35:11 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-24 09:35:11 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-24 09:35:12 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-24 09:35:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:35:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:35:12 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:35:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:35:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:35:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:35:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:35:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:35:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:35:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:35:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:35:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:35:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:35:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:35:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=18562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:35:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:35:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:35:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:35:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:35:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:35:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:35:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:35:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:35:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:35:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:35:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:35:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:35:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:35:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:35:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:35:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:35:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:35:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:35:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:35:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:35:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:35:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:35:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:35:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:35:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:35:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:35:23 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:35:23 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:35:23 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:35:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:35:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:35:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:35:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:35:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:35:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:35:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:35:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:35:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:35:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:35:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:35:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:35:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:35:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:35:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:35:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:35:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:35:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:35:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:35:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:35:25 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:35:25 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:35:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:35:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:35:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:35:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:35:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:35:26 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:35:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:35:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:35:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:35:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:35:26 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:35:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:35:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:35:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:35:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:35:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:35:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:35:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:35:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:35:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:35:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:27 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:35:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:35:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:35:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:35:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:35:27 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:35:28 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:35:28 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:35:29 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:35:29 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:35:30 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:35:30 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:35:31 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:35:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:35:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:35:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:35:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:35:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:35:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:35:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:35:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:35:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:35:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:31 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:35:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:35:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:35:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:32 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:35:32 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:35:33 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:35:33 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:35:33 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:35:34 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:35:34 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:35:35 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:35:35 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:35:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:35:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:35:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:35:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:35:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:35:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:35:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:35:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:35:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:35:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:35:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:36 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:35:36 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:35:37 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:35:37 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:35:38 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:35:38 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:35:39 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:35:39 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:35:40 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:35:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:35:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:35:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:35:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:35:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:35:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:35:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:40 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:35:41 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:35:41 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:35:41 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:35:42 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:35:42 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:35:43 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:35:43 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:35:44 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 09:35:44 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 09:35:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:35:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:35:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:35:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:35:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:35:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:35:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:35:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:35:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:35:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:35:44 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-24 09:35:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:45 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 09:35:45 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 09:35:46 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 09:35:46 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 09:35:47 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 09:35:47 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 09:35:48 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 09:35:48 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 09:35:48 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 09:35:49 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 09:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:35:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:35:49 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:35:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:35:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:35:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:35:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:35:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:35:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:35:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:49 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:35:49 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-24 09:35:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:49 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 09:35:50 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 09:35:50 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 09:35:51 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 09:35:51 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 09:35:52 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 09:35:52 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 09:35:53 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 09:35:53 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 09:35:54 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 09:35:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:35:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:35:54 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:35:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:35:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:35:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:35:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:35:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:35:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:35:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:35:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:35:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:35:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:35:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:54 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 09:35:55 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 09:35:55 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 09:35:56 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 09:35:56 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 09:35:56 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 09:35:57 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 09:35:57 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 09:35:58 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 09:35:58 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 09:35:59 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-24 09:35:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:35:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:35:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:35:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:35:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:35:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:35:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:35:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:35:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:35:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:35:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:35:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:35:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:35:59 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-24 09:36:00 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-24 09:36:00 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-24 09:36:01 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-24 09:36:01 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-24 09:36:02 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-24 09:36:02 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-24 09:36:03 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-24 09:36:03 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-24 09:36:04 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-24 09:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:36:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:36:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:36:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:36:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:04 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-24 09:36:04 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-24 09:36:05 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-24 09:36:05 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-24 09:36:06 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-24 09:36:06 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-24 09:36:07 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-24 09:36:07 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-24 09:36:08 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-24 09:36:08 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-24 09:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:36:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:36:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:36:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:36:09 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:09 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-24 09:36:09 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-24 09:36:10 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-24 09:36:10 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-24 09:36:11 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-24 09:36:11 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-24 09:36:11 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-24 09:36:12 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-24 09:36:12 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-24 09:36:13 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-24 09:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:13 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:36:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:36:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:36:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:36:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:13 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:36:13 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:13 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-24 09:36:14 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-24 09:36:14 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-24 09:36:15 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-24 09:36:15 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-24 09:36:16 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-24 09:36:16 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-24 09:36:17 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-24 09:36:17 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-24 09:36:18 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-24 09:36:18 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-24 09:36:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:18 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:36:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:36:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:36:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:36:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:36:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:18 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:36:18 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:19 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-24 09:36:19 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-24 09:36:19 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-24 09:36:20 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-24 09:36:20 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-24 09:36:21 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-24 09:36:21 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-24 09:36:22 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-24 09:36:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:22 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:36:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:36:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:36:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:36:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:36:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:36:22 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:22 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-24 09:36:23 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-24 09:36:23 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-24 09:36:24 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-24 09:36:24 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-24 09:36:25 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-24 09:36:25 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-24 09:36:26 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-24 09:36:26 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-24 09:36:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:26 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:36:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:36:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:36:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:36:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:36:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:36:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:36:26 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:36:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:26 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-24 09:36:27 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-24 09:36:27 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-24 09:36:28 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-24 09:36:28 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-24 09:36:29 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-24 09:36:29 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-24 09:36:30 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-24 09:36:30 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-24 09:36:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:31 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:36:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:36:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:36:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:36:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:36:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:36:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:36:31 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:36:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:31 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-24 09:36:31 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-24 09:36:32 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-24 09:36:32 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-24 09:36:33 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-24 09:36:33 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-24 09:36:34 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-24 09:36:34 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-24 09:36:34 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-24 09:36:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:35 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:36:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:36:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:36:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:36:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:36:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:35 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-24 09:36:35 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:36:35 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:35 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-24 09:36:36 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-24 09:36:36 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-24 09:36:37 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-24 09:36:37 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-24 09:36:38 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-24 09:36:38 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-24 09:36:39 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-24 09:36:39 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-24 09:36:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:39 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:36:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:36:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:36:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:36:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:36:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:36:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:36:39 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:36:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:40 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-24 09:36:40 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-24 09:36:41 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-24 09:36:41 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-24 09:36:41 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-24 09:36:42 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-24 09:36:42 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-24 09:36:43 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-24 09:36:43 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-24 09:36:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:43 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:36:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:36:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:36:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:36:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:36:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:36:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:36:44 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:44 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-24 09:36:44 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-24 09:36:45 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-24 09:36:45 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-24 09:36:46 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-24 09:36:46 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-24 09:36:47 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-24 09:36:47 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-24 09:36:48 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-24 09:36:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:48 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:36:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:36:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:36:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:36:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:36:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:36:48 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:48 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-24 09:36:49 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-24 09:36:49 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-24 09:36:49 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-24 09:36:50 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-24 09:36:50 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2024-10-24 09:36:51 [DEBUG] clck_gen.py:102 IND CLOCK 19278
2024-10-24 09:36:51 [DEBUG] clck_gen.py:102 IND CLOCK 19380
2024-10-24 09:36:52 [DEBUG] clck_gen.py:102 IND CLOCK 19482
2024-10-24 09:36:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:36:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:36:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:36:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:36:52 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:36:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:36:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:36:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:36:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:36:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:36:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:36:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:36:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:36:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:36:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:36:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:36:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:36:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:36:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:36:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:36:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:36:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:36:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:36:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:36:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:36:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:36:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:36:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:36:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:36:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:37:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:37:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:37:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:37:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:37:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:37:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:37:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:37:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:37:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:37:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:37:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:37:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:37:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:37:03 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:37:03 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:37:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:03 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:37:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:37:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:37:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:37:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:37:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:37:03 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:37:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:37:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:37:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:37:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:37:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:37:04 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:37:05 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:37:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:37:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:37:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:37:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:37:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:05 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:37:06 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:37:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:37:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:37:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:37:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:37:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:06 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:37:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:07 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:37:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:37:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:37:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:37:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:37:07 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:37:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:08 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:08 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:37:09 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:37:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:37:09 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-24 09:37:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:09 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:37:10 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:37:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:10 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:37:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:10 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:37:10 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-24 09:37:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:10 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:37:10 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:37:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:11 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:37:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:37:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:11 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:37:11 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:37:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:12 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:37:12 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:13 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:13 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:37:14 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:37:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:14 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:37:14 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:37:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:14 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:37:15 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:37:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:15 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:37:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:15 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:37:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:37:15 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:37:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:16 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:37:16 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:37:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:16 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:37:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:37:16 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:37:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:17 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:37:17 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:37:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:17 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:37:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:37:17 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:37:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:18 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:37:18 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:37:18 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:37:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:19 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:37:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:19 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:37:19 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:37:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:19 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:37:19 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:37:20 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:20 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:37:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:37:20 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:20 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:37:21 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:37:21 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:37:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:21 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:37:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:37:22 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:22 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:37:22 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:37:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:23 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:37:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:37:23 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:23 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:37:23 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:37:24 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 09:37:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:24 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:37:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:24 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 09:37:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:24 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:37:24 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:37:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:25 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 09:37:25 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 09:37:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:25 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:37:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:25 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 09:37:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:37:26 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:37:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:26 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 09:37:26 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 09:37:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:27 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:37:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:37:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:37:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:37:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:37:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:37:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:37:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:37:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:37:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:37:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:37:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:37:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:37:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:37:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:37:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:37:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:37:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:37:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:37:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:37:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:37:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:37:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:37:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:37:32 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:37:32 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:32 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:37:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:37:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:37:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:37:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:37:33 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:37:34 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:37:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:37:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:37:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:37:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:37:34 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:37:35 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:37:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:37:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:37:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:37:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:37:35 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:37:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:36 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:37:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:37:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:37:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:37:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:37:36 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:37:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:37:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:37 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:37:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:37:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:37:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:37:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:37:37 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:37:38 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:37:38 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:37:38 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:37:39 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:37:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:39 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:37:40 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:37:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:37:40 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:40 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:37:41 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:37:41 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:37:42 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:37:42 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:37:43 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:37:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:43 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:37:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:44 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:37:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:37:44 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:37:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:37:44 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:37:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:44 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:37:45 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:37:45 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:37:46 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:37:46 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:37:46 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:47 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:37:47 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:47 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:37:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:37:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:48 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:37:48 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:37:49 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:37:49 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:37:50 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:37:50 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:37:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:51 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:37:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:37:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:51 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:37:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:52 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:37:52 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:37:53 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:37:53 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:37:54 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 09:37:54 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 09:37:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:54 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 09:37:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:37:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:37:54 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:37:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:55 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 09:37:55 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 09:37:56 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 09:37:56 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 09:37:57 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 09:37:57 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 09:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:58 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 09:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:37:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:37:58 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:37:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:37:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:37:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:37:58 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:37:58 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:37:58 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 09:37:59 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 09:37:59 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 09:38:00 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 09:38:00 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 09:38:01 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 09:38:01 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 09:38:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:38:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:38:01 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:38:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:38:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:38:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:38:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:38:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:38:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:38:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:38:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:38:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:38:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:38:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:38:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:38:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:38:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:38:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:38:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:38:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:38:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:38:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:38:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:38:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:38:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:38:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:38:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:38:07 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:38:07 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:38:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:07 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:38:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:38:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:38:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:38:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:38:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:38:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:38:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:38:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:38:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:38:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:38:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:38:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:38:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:38:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:38:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:38:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:38:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:38:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:38:09 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:38:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:38:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:38:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:38:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:38:10 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:38:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:10 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:38:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:38:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:38:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:38:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:38:11 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:38:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:38:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:38:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:38:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:38:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:11 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:38:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:38:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:38:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:38:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:38:12 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:38:12 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:38:13 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:38:13 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:38:14 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:38:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:14 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:38:14 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:38:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:38:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:38:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:38:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:38:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:38:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:38:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:15 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:38:15 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:38:16 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:38:16 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:38:17 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:38:17 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:18 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:38:18 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:38:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:38:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:38:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:38:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:38:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:19 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:38:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:19 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:38:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:38:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:38:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:38:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:38:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:38:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:38:19 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:38:19 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:20 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:38:20 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:38:21 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:38:21 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:38:21 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:38:22 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:38:22 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:38:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:23 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:38:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:38:23 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:38:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:38:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:38:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:38:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:38:23 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:38:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:23 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:38:24 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:38:24 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:38:25 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:38:25 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:38:26 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:38:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:26 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:38:27 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:38:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:38:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:38:27 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:38:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:38:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:38:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:38:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:38:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:38:27 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:38:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:27 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:38:28 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:38:28 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 09:38:29 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 09:38:29 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 09:38:29 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 09:38:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:30 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 09:38:30 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 09:38:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:38:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:38:31 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:38:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:38:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:38:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:38:31 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:31 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 09:38:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:31 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 09:38:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:38:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:38:32 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:38:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:38:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:38:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:38:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:38:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:38:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:38:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:32 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 09:38:32 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 09:38:33 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 09:38:33 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 09:38:34 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 09:38:34 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 09:38:35 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 09:38:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:38:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:38:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:38:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:38:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:38:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:38:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:35 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 09:38:36 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 09:38:36 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 09:38:36 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 09:38:37 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 09:38:37 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 09:38:38 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 09:38:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:38:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:38:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:38:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:38:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:38 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 09:38:39 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 09:38:39 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 09:38:40 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 09:38:40 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 09:38:41 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 09:38:41 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 09:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:38:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:38:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:38:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:42 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 09:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:42 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 09:38:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:38:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:38:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:38:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:38:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:38:43 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 09:38:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:38:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:38:43 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:43 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-24 09:38:44 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-24 09:38:44 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-24 09:38:44 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-24 09:38:45 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-24 09:38:45 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-24 09:38:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:46 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-24 09:38:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:38:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:38:46 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:38:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:38:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:38:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:38:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:38:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:38:46 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:38:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:46 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-24 09:38:47 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-24 09:38:47 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-24 09:38:48 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-24 09:38:48 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-24 09:38:49 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-24 09:38:49 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-24 09:38:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:38:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:38:50 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:38:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:38:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:38:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:38:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:38:50 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:38:50 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:38:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:50 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-24 09:38:50 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-24 09:38:51 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-24 09:38:51 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-24 09:38:51 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-24 09:38:52 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-24 09:38:52 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-24 09:38:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:38:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:38:53 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:38:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:38:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:38:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:38:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:38:53 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:38:53 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:38:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:53 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-24 09:38:53 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-24 09:38:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:38:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:38:54 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:38:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:38:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:38:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:38:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:38:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:38:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:38:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:38:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:38:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:38:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:38:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:38:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:38:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:38:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:38:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:38:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:38:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:38:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:38:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:38:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:38:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:38:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:38:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:38:59 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:38:59 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:38:59 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:38:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:38:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:38:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:39:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:39:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:39:01 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:39:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:39:02 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:39:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:02 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:39:03 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:39:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:03 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:39:04 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:39:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:04 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:39:04 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:39:05 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:39:05 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:39:06 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:39:06 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:39:07 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:39:07 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:39:08 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:39:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:39:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:39:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:39:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:39:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:39:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:39:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:39:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:39:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2013 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:39:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:39:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2013 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:39:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2013 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:39:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2013 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:39:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2013 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:39:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:39:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:39:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:39:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:39:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:39:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:39:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:39:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:39:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:39:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:39:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:39:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:39:14 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:39:14 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:39:14 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:39:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:39:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:39:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:39:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:39:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:39:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:39:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:39:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:39:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:39:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:39:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:39:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:39:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:39:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:39:17 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:39:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:39:18 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:39:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:39:19 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:39:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:39:20 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:39:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:39:21 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:39:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:39:22 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:39:22 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:39:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:39:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:39:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:39:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:39:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:39:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:39:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:39:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:39:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:39:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:39:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:39:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:39:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:39:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:39:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:39:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:39:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:39:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:39:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:39:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:39:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:39:28 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:39:28 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:39:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:39:28 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:39:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:39:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:39:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:39:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:39:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:39:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:39:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:39:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:39:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:39:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:39:29 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:39:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:30 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:39:30 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:39:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:31 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:39:31 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:39:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:32 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:39:32 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:39:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:33 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:39:33 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:39:34 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:39:34 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:39:34 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:39:35 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:39:35 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:39:36 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:39:36 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:39:37 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:39:37 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:39:38 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:39:38 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:39:39 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:39:39 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:39:40 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:39:40 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:39:41 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:39:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:39:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:39:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:39:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:39:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:39:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:39:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:39:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:39:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:39:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:39:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:39:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:39:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:39:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:39:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:39:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:39:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:39:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:39:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:39:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:39:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:39:46 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:39:46 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:39:46 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:39:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:39:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:39:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:39:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:39:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:39:47 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:39:48 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:39:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:48 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:39:48 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:39:48 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:39:49 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:39:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:49 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:39:50 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:39:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:50 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:39:50 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:39:50 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:39:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:51 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:39:51 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:39:51 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:39:51 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:39:52 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:39:52 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:39:52 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:39:53 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:39:53 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:39:54 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:39:54 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:39:54 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:39:55 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:39:55 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:39:56 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:39:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:39:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:39:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:39:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:39:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:39:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:39:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:39:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:39:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:39:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:39:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:39:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:39:56 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2217 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:39:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:39:56 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2217 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:39:56 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2217 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:39:56 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2217 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:39:56 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2217 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:39:56 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2218 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:39:56 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2218 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:39:56 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2218 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:39:56 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2218 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:39:56 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2218 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:39:56 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2218 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:39:56 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2218 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:39:56 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2218 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:40:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:40:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:40:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:40:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:40:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:40:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:40:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:40:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:40:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:40:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:40:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:40:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:40:02 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:40:02 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:02 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:40:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:40:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:40:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:40:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:40:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:40:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:40:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:40:03 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:03 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:40:03 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:03 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:40:03 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:03 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:40:03 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:03 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:40:03 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:03 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:40:03 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:03 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:40:03 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:03 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:40:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:40:03 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:40:03 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:04 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:40:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:40:04 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:04 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:04 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:40:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:40:04 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:04 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:40:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:40:04 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:04 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:40:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:40:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:40:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:40:05 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:40:05 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:40:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:05 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:40:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:40:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:40:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:40:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:40:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:40:05 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=810 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:40:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:40:05 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=810 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:05 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=810 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:05 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=810 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:05 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=810 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:05 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=810 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:05 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=810 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:05 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=810 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:40:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:40:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:40:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:40:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:40:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:40:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:40:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:40:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:40:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:40:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:40:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:40:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:40:10 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:40:10 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:40:10 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:40:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:40:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:40:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:40:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:40:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:40:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:40:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:40:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:40:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:40:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:40:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:40:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:40:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:40:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:40:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:40:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:40:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:40:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:40:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:40:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:40:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:40:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:40:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:40:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:40:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:40:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:40:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:40:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:40:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:40:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:40:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:40:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:40:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:40:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:40:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:40:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:40:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:40:23 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:40:23 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:40:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:23 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:40:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:40:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:40:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:40:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:25 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:40:25 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:40:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:26 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:40:26 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:40:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:27 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:40:27 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:40:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:28 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:40:28 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:40:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:40:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:40:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:40:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:40:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:40:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:40:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:40:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1306 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1306 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1307 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1307 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1307 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1307 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1307 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1307 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1307 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1307 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:40:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:40:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:40:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:40:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:40:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:40:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:40:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:40:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:40:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:40:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:40:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:40:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:40:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:40:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:40:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:40:34 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:40:34 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:40:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:34 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:40:34 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:40:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:40:35 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:40:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:36 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:40:36 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:40:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:37 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:40:37 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:40:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:38 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:40:38 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:40:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:39 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:40:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:40:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:40:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:40:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:40:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:40:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:40:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1203 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:40:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1203 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1203 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1203 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1203 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1203 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1203 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1203 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:40:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:40:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:40:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:40:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:40:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:40:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:40:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:40:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:40:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:40:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:40:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:40:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:40:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:40:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:40:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:40:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:40:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:40:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:40:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:40:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:40:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:40:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:40:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:40:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:40:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:40:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:40:50 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:40:50 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:40:50 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:40:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:40:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:40:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:40:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:40:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:40:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:40:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:40:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:40:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:40:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:40:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:40:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:40:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:40:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:40:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:40:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:40:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:40:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:40:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:40:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:40:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:40:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:40:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:40:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:40:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:40:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:40:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:40:57 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:40:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:40:58 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:40:59 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:40:59 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:40:59 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:41:00 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:41:00 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:41:01 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:41:01 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:41:02 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:41:02 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:41:03 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:41:03 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:41:04 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:41:04 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:41:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:41:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:41:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:41:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:41:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:41:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:41:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:41:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:41:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:41:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:41:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:41:04 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3315 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:41:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:41:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:41:04 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3315 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:41:04 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3315 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:41:04 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3315 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:41:04 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3315 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:41:04 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3315 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:41:04 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3315 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:41:04 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3315 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:41:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:41:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:41:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:41:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:41:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:41:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:41:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:41:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:41:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:41:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:41:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:41:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:41:10 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:41:10 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:41:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:41:10 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:41:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:41:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:41:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:41:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:41:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:41:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:41:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:41:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:41:10 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:41:10 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:41:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:41:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:41:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:41:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:41:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:41:10 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:41:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:41:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:41:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:41:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:41:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:41:11 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:41:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:41:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:41:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:41:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:41:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:41:12 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:41:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:41:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:41:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:41:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:41:13 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:41:13 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:41:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:41:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:41:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:41:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:41:14 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:41:14 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:41:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:41:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:41:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:41:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:41:15 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:41:15 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:41:16 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:41:16 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:41:16 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:41:17 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:41:17 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:41:18 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:41:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:41:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:41:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:41:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:41:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:41:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:41:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:41:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:41:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:41:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:41:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:41:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:41:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:41:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:41:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:41:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:41:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:41:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:41:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:41:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:41:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:41:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:41:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:41:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:41:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:41:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:41:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:41:24 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:41:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:41:24 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:41:24 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:41:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:41:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:41:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:41:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:41:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:41:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:41:24 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:41:24 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:41:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:41:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:41:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:41:24 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:41:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:41:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:41:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:41:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:41:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:41:25 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:41:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:41:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:41:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:41:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:41:25 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:41:26 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:41:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:41:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:41:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:41:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:41:26 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:41:27 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:41:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:41:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:41:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:41:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:41:27 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:41:28 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:41:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:41:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:41:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:41:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:41:28 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:41:29 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:41:29 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:41:30 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:41:30 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:41:31 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:41:31 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:41:32 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:41:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:41:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:41:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:41:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:41:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:41:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:41:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:41:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:41:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:41:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:41:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:41:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:41:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:41:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:41:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:41:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:41:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:41:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:41:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:41:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:41:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:41:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:41:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:41:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:41:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:41:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:41:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:41:37 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:41:37 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:41:37 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:41:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:41:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:41:37 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:41:37 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:41:37 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:41:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:41:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:41:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:41:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:41:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:41:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:41:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:41:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:41:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:41:38 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:41:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:41:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:41:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:41:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:41:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:41:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:41:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:41:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:41:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:41:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:41:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:41:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:41:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:41:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:41:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:41:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:41:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:41:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:41:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:41:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:41:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:41:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:41:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:41:44 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:41:44 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:41:44 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:41:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:41:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:41:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:41:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:41:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:41:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:41:44 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:41:44 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:41:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:41:44 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:41:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:41:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:41:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:41:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:41:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:41:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:41:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:41:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:41:45 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:41:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:41:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:41:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:41:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:41:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:41:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:41:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:41:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:41:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:41:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:41:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:41:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:41:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:41:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:41:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:41:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:41:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:41:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:41:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:41:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:41:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:41:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:41:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:41:50 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:41:50 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:41:50 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:41:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:41:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:41:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:41:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:41:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:41:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:41:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:41:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:41:51 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:41:51 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:41:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:41:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:41:51 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:41:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:41:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:41:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:41:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:41:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:41:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:41:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:41:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:41:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:41:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:41:52 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:41:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:41:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:41:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:41:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:41:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:41:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:41:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:41:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:41:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:41:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:41:52 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=353 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:41:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:41:52 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=353 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:41:52 [WARNING] transceiver.py:250 (TRX2@172.18.90.20:5700/2) RX TRXD message (ver=1 fn=353 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:41:52 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=353 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:41:52 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=353 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:41:52 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=353 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:41:52 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=353 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:41:52 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=353 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:41:52 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=353 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:41:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:41:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:41:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:41:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:41:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:41:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:41:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:41:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:41:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:41:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:41:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:41:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:41:57 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:41:57 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:41:57 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:41:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:41:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:41:57 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:41:57 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:41:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:41:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:41:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:41:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:41:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:41:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:41:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:41:59 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:41:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:41:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:41:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:41:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:41:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:41:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:42:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:42:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:42:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:42:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:42:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:42:00 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:42:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:42:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:42:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:42:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:42:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:42:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:42:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:42:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:42:02 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:42:02 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:42:03 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:42:03 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:42:04 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:42:04 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:42:05 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:42:05 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:42:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:42:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:42:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:42:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:42:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:42:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:42:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:42:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:42:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:42:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:42:05 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:42:05 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:42:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:42:05 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:42:05 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-24 09:42:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:06 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:42:06 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:42:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:42:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:42:06 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:42:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:42:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:42:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:42:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:42:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:42:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:42:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:42:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:42:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:42:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:42:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:42:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:42:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:42:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:42:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:42:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:42:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:42:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:42:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:42:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:42:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:42:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:42:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:42:12 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:42:12 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:42:12 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:42:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:42:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:42:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:42:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:42:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:42:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:42:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:42:12 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:42:12 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:42:12 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:42:12 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:42:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:12 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:42:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:42:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:42:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:42:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:42:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:42:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:42:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:42:13 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:42:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:42:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:42:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:42:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:42:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:42:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:42:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:42:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:42:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:42:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:42:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:42:13 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=352 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:42:13 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=352 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:42:13 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=352 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:42:13 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=352 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:42:13 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=352 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:42:13 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=352 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:42:13 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=352 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:42:13 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=352 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:42:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:42:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:42:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:42:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:42:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:42:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:42:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:42:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:42:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:42:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:42:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:42:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:42:18 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:42:18 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:42:18 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:42:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:42:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:42:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:42:19 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:42:19 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:42:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:42:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:42:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:42:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:19 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:42:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:42:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:42:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:42:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:42:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:42:20 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:42:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:42:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:42:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:42:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:42:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:42:21 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:42:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:42:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:42:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:42:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:42:21 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:42:22 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:42:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:42:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:42:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:42:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:42:22 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:42:23 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:42:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:42:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:42:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:42:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:42:23 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:42:24 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:42:24 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:42:25 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:42:25 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:42:25 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:42:26 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:42:26 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:42:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:42:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:42:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:42:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:42:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:42:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:42:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:42:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:42:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:42:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:42:27 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:42:27 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:42:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:42:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:42:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:42:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:27 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:42:27 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:42:28 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:42:28 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:42:29 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:42:29 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:42:30 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:42:30 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:42:31 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:42:31 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:42:32 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:42:32 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:42:32 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:42:33 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:42:33 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:42:34 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:42:34 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:42:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:42:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:42:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:42:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:42:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:42:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:42:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:42:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:42:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:42:35 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:42:35 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:42:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:42:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:42:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:35 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:42:35 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:42:36 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:42:36 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:42:37 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:42:37 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:42:38 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:42:38 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:42:39 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:42:39 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:42:40 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 09:42:40 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 09:42:40 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 09:42:41 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 09:42:41 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 09:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 09:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 09:42:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:42:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:42:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:42:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:42:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:42:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:42:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:42:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:42:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:42:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:42:43 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:42:43 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:42:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:42:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:42:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:42:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:43 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 09:42:43 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 09:42:44 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 09:42:44 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 09:42:45 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 09:42:45 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 09:42:46 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 09:42:46 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 09:42:47 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 09:42:47 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 09:42:48 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 09:42:48 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 09:42:48 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 09:42:49 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 09:42:49 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 09:42:50 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 09:42:50 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 09:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:42:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:42:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:42:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:42:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:42:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:42:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:42:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:42:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:42:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:42:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:42:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=7129 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:42:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=7129 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:42:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=7129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:42:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=7129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:42:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=7129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:42:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=7129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:42:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=7129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:42:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=7129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:42:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:42:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:42:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:42:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:42:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:42:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:42:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:42:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:42:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:42:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:42:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:42:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:42:56 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:42:56 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:42:56 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:42:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:42:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:42:56 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:42:56 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:42:56 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:42:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:42:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:42:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:42:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:42:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:42:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:42:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:42:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:42:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:42:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:42:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:42:58 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:42:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:42:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:42:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:42:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:42:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:42:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:42:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:42:59 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:42:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:42:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:42:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:42:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:42:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:42:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:42:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:42:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:42:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:42:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:42:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:43:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:43:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:43:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:43:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:43:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:43:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:43:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:43:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:43:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:43:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:43:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:43:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:43:04 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:43:04 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:43:04 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:43:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:43:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:43:04 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:43:04 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:43:04 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:43:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:43:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:43:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:43:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:43:05 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:43:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:43:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:43:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:43:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:43:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:43:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:43:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:43:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:43:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:43:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:43:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:43:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:43:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:43:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:43:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:43:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:43:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:43:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:43:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:43:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:43:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:43:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:43:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:43:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:43:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:43:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:43:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:43:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:43:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:43:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:43:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:43:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:43:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:43:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:43:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:43:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:43:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:43:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:43:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:43:11 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:43:11 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:43:11 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:43:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:43:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:43:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:43:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:12 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:43:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:43:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:13 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:43:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:43:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:14 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:43:14 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:43:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:15 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:43:15 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:43:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:16 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:43:16 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:43:17 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:43:17 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:43:18 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:43:18 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:43:19 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:43:19 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:43:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:43:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:43:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:43:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:43:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:43:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:43:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:43:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:43:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:43:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:43:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:43:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:43:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:43:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:43:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:43:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:43:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:43:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:43:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:43:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:43:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:43:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:43:25 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:43:25 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:43:25 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:43:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:43:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:43:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:43:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:43:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:43:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:43:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:43:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:43:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:43:25 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:43:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:43:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:43:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:43:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:43:26 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:43:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:26 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:43:27 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:43:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:27 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:43:28 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:43:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:28 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:43:29 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:43:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:29 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:43:30 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:43:30 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:43:31 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:43:31 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:43:32 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:43:32 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:43:33 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:43:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:43:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:43:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:43:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:43:33 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:43:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:43:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:43:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:43:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:43:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:43:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:43:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:43:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1871 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1871 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1871 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1871 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1871 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1871 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1871 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1871 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1872 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1872 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1872 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1872 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1872 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1872 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1872 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1872 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:43:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:43:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:43:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:43:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:43:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:43:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:43:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:43:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:43:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:43:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:43:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:43:38 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:43:38 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:43:38 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:43:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:43:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:43:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:43:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:43:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:43:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:43:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:43:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:43:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:43:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:43:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:42 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:43:42 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:43:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:43 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:43:43 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:43:44 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:43:44 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:43:45 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:43:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:43:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:43:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:43:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:43:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:43:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:43:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:43:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:43:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:43:45 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1563 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:45 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1563 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:45 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:45 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:45 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:45 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:45 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:45 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:43:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:43:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:43:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:43:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:43:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:43:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:43:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:43:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:43:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:43:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:43:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:43:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:43:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:43:51 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:43:51 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:43:51 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:43:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:43:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:43:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:43:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:43:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:43:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:43:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:43:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:43:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:43:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:43:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:43:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:43:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:43:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:43:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:43:54 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:43:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:43:55 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:43:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:43:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:43:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:43:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:43:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:43:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:43:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:43:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:43:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:43:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:43:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:43:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:43:56 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:43:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:43:58 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:43:58 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:43:59 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:43:59 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:43:59 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:44:00 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:44:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:44:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:44:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:44:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:44:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:44:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:44:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:44:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:44:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:44:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:44:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:44:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:44:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:44:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:44:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:44:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:44:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:44:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:44:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:44:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:44:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:44:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:44:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:44:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:44:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:44:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:44:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:44:06 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:44:06 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:44:06 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:44:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:44:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:44:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:44:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:44:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:44:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:44:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:44:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:44:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:44:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:44:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:44:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:44:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:44:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:44:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:44:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:44:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:44:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:44:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:44:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:44:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:44:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:44:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:44:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:44:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:44:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:44:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:44:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:44:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:44:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:44:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:44:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:44:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:44:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:44:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:44:11 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:44:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:12 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:44:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:44:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:13 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:44:13 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:44:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:14 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:44:14 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:44:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:15 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:44:15 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:44:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:44:16 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:44:16 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:44:17 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:44:17 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:44:17 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:44:18 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:44:18 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:44:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:44:19 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:44:19 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:44:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:20 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:44:20 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:44:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:21 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:44:21 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:44:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:22 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:44:22 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:44:23 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:44:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:23 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:44:24 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:44:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:24 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:44:25 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:44:25 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:44:25 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:44:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:44:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:44:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:44:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:44:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:44:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:44:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:44:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:44:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:44:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:44:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:44:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4470 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:44:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:44:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4470 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:44:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4470 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:44:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4470 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:44:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4470 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:44:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4470 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:44:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4470 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:44:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4470 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:44:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:44:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:44:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:44:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:44:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:44:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:44:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:44:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:44:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:44:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:44:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:44:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:44:31 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:44:31 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:44:31 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:44:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:44:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:44:31 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:44:31 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=126 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:44:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:44:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:44:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:44:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 09:44:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:44:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:44:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:44:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:44:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:44:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:44:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:44:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:44:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:44:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:44:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:44:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:44:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:44:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:44:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:44:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:44:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:44:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:44:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:44:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:44:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:44:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:44:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:44:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:44:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:44:38 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:44:38 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:44:38 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:44:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:44:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:44:38 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:44:38 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:44:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:39 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:39 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:39 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:39 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:39 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:39 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:39 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:39 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:39 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:39 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:39 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:39 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:39 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:39 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:39 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:39 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:44:39 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:39 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:39 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-24 09:44:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:44:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:44:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:44:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:44:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 09:44:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:44:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:44:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:44:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:44:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:44:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:44:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:44:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:44:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:44:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:44:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:44:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:44:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:44:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:44:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:44:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:44:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:44:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:44:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:44:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:44:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:44:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:44:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:44:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:44:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:44:45 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:44:45 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:44:45 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:44:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:44:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:44:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:44:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:44:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:44:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:44:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:44:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:44:47 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:44:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:44:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:44:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:44:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:44:48 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:44:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:44:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:44:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:44:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:44:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:44:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:44:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:44:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:44:49 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:44:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:44:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:44:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:44:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:44:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:44:50 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:44:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:44:51 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:44:51 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:44:52 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:44:52 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:44:53 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:44:53 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:44:54 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:44:54 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:44:55 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:44:55 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:44:55 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:44:56 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:44:56 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:44:57 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:44:57 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:44:58 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:44:58 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:44:59 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:44:59 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:45:00 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:45:00 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:45:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:45:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:45:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:45:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:45:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:45:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:45:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:45:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:45:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:45:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:45:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:45:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:45:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:45:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:45:01 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-24 09:45:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:45:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:45:01 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:45:01 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:45:02 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:45:02 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:45:03 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:45:03 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:45:03 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:45:04 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:45:04 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:45:05 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:45:05 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:45:06 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:45:06 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 09:45:07 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 09:45:07 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 09:45:08 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 09:45:08 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 09:45:09 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 09:45:09 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 09:45:10 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 09:45:10 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 09:45:11 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 09:45:11 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 09:45:11 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 09:45:12 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 09:45:12 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 09:45:13 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 09:45:13 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 09:45:14 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 09:45:14 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 09:45:15 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 09:45:15 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 09:45:16 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 09:45:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:45:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:45:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:45:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:45:16 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:45:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:45:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:45:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:45:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:45:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:45:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:45:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:45:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:45:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:45:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:45:16 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-24 09:45:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:45:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:45:16 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 09:45:17 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 09:45:17 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 09:45:18 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 09:45:18 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 09:45:19 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 09:45:19 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 09:45:19 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 09:45:20 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 09:45:20 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 09:45:21 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 09:45:21 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-24 09:45:22 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-24 09:45:22 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-24 09:45:23 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-24 09:45:23 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-24 09:45:24 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-24 09:45:24 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-24 09:45:25 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-24 09:45:25 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-24 09:45:26 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-24 09:45:26 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-24 09:45:26 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-24 09:45:27 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-24 09:45:27 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-24 09:45:28 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-24 09:45:28 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-24 09:45:29 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-24 09:45:29 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-24 09:45:30 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-24 09:45:30 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-24 09:45:31 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-24 09:45:31 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-24 09:45:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:45:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:45:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:45:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:45:31 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:45:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:45:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:45:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:45:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:45:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:45:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:45:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:45:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:45:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:45:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:45:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:45:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:45:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:45:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:45:32 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-24 09:45:32 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-24 09:45:33 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-24 09:45:33 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-24 09:45:34 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-24 09:45:34 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-24 09:45:34 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-24 09:45:35 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-24 09:45:35 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-24 09:45:36 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-24 09:45:36 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-24 09:45:37 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-24 09:45:37 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-24 09:45:38 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-24 09:45:38 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-24 09:45:39 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-24 09:45:39 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-24 09:45:40 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-24 09:45:40 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-24 09:45:41 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-24 09:45:41 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-24 09:45:41 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-24 09:45:42 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-24 09:45:42 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-24 09:45:43 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-24 09:45:43 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-24 09:45:44 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-24 09:45:44 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-24 09:45:45 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-24 09:45:45 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-24 09:45:46 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-24 09:45:46 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-24 09:45:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:45:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:45:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:45:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:45:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:45:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:45:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:45:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:45:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:45:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:45:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:45:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:45:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:45:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:45:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:45:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=13457 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:45:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=13457 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:45:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=13457 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:45:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=13457 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:45:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=13457 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:45:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=13457 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:45:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=13457 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:45:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=13457 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:45:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:45:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:45:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:45:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:45:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:45:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:45:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:45:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:45:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:45:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:45:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:45:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:45:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:45:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:45:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:45:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:45:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:45:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:45:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:45:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:45:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:45:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:45:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:45:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:45:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:45:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:45:57 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:45:57 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:45:57 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:45:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:45:57 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:45:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:45:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:45:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:45:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:45:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:45:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:45:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:45:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:45:59 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:45:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:45:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:45:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:45:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:45:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:46:00 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:46:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:46:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:46:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:46:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:46:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:46:00 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:46:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:46:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:46:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:46:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:46:01 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:46:01 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:46:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:46:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:46:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:46:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:46:02 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:46:02 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:46:03 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:46:03 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:46:04 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:46:04 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:46:05 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:46:05 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:46:06 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:46:06 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:46:07 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:46:07 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:46:07 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:46:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:46:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:46:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:46:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:46:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:46:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:46:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:46:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:46:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:46:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:46:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:46:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:46:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:46:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:46:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:46:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:46:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:46:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:46:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:46:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:46:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:46:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:46:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:46:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:46:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:46:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:46:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:46:13 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:46:13 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:46:13 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:46:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:46:13 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:46:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:46:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:46:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:46:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:46:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:46:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:46:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:46:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:46:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:46:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:46:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:46:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:46:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:46:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:46:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:46:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:46:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:46:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:46:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:46:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:46:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:46:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:46:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:46:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:46:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:46:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:46:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:46:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:46:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:46:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:46:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:46:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:46:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:46:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:46:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:46:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:46:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:46:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:46:22 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:46:22 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:46:23 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:46:23 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:46:24 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:46:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:46:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:46:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:46:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:46:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:46:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:46:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:46:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:46:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:46:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:46:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:46:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:46:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:46:24 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2381 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:46:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:46:24 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2381 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:46:24 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2381 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:46:24 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2381 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:46:24 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2381 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:46:24 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2381 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:46:24 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2381 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:46:24 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2381 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:46:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:46:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:46:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:46:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:46:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:46:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:46:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:46:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:46:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:46:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:46:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:46:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:46:29 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:46:29 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:46:29 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:46:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:46:29 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:46:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:46:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:46:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:46:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:46:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:46:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:46:30 [DEBUG] fake_trx.py:263 (MS@172.18.90.22:6700) Recv SETTA cmd
2024-10-24 09:46:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:46:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:46:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:46:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:46:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:46:31 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:46:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:46:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:46:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:46:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:46:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:46:32 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:46:32 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:46:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:46:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:46:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:46:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:46:33 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:46:33 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:46:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:46:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:46:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:46:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:46:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:46:34 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:46:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:46:35 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:46:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:46:36 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:46:37 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:46:37 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:46:38 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:46:38 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:46:39 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:46:39 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:46:40 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:46:40 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:46:40 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:46:41 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:46:41 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:46:42 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:46:42 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:46:43 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:46:43 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:46:44 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:46:44 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:46:45 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:46:45 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:46:46 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:46:46 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:46:47 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:46:47 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:46:47 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:46:48 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:46:48 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:46:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:46:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:46:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:46:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:46:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:46:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:46:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:46:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:46:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:46:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:46:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:46:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:46:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:46:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:46:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:46:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:46:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:46:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:46:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:46:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:46:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:46:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:46:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:46:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:46:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:46:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:46:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:46:54 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:46:54 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:46:54 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:46:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:46:54 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:46:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:46:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:46:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:46:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:46:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:46:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:46:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:46:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:46:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:46:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:46:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:46:57 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:46:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:46:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:46:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:46:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:46:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:46:58 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:46:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:46:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:46:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:46:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:46:58 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:46:59 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:46:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:46:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:46:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:46:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:46:59 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:47:00 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:47:00 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:47:00 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:47:01 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:47:01 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:47:04 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:47:04 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:47:05 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:47:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:47:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:47:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:47:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:47:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:47:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:47:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:47:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:47:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:47:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:47:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:47:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:47:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:47:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:47:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:47:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:47:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:47:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:47:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:47:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:47:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:47:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:47:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:47:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:47:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:47:10 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:47:10 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:10 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:47:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:47:10 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:47:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:47:10 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:47:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:47:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:47:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:47:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:47:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:47:11 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:47:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:47:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:47:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:47:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:47:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:47:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:47:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:47:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:47:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:47:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:47:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:47:13 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:47:14 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:47:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:47:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:47:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:47:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:47:14 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:47:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:47:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:47:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:47:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:47:16 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:47:16 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:47:16 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:47:17 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:47:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:47:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:47:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:47:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:47:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:47:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:47:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:47:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:47:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:47:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:47:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:47:17 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1562 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:47:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:47:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:47:17 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1562 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:47:17 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1562 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:47:17 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1562 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:47:17 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1562 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:47:17 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:47:17 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:47:17 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:47:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:47:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:47:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:47:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:47:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:47:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:47:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:47:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:47:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:47:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:47:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:47:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:47:23 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:47:23 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:47:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:23 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:47:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:47:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:47:23 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:47:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:47:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:47:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:47:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:47:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:47:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:47:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:47:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:47:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:47:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:47:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:47:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:47:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:47:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:47:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:47:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:47:25 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:47:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:47:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:47:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:47:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:47:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:47:26 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:47:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:47:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:47:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:47:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:47:26 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:47:27 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:47:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:47:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:47:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:47:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:47:27 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:47:28 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:47:28 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:47:29 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:47:29 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:47:30 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:47:30 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:47:31 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:47:31 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:47:32 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:47:32 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:47:32 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:47:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:47:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:47:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:47:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:47:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:47:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:47:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:47:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:47:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:47:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:47:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:47:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:47:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:47:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:47:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:47:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:47:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:47:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:47:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:47:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:47:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:47:38 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:47:38 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:38 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:47:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:47:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:47:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:47:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:47:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:47:39 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:47:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:47:39 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:47:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:47:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:47:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:47:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:47:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:47:40 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:47:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:47:40 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:47:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:47:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:47:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:47:40 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=496 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:47:40 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=496 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:47:40 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=496 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:47:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:47:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:47:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:47:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:47:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:47:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:47:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:47:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:47:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:47:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:47:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:47:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:47:46 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:47:46 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:46 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:47:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:47:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:47:46 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:47:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:47:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:47:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:47:46 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=209 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:47:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:47:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:47:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:47:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:47:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:47:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:47:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:47:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:47:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:47:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:47:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:47:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:47:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:47:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:47:52 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:47:52 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:47:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:52 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:47:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:47:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:47:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:47:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:47:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:47:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:47:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:47:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:47:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:47:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:52 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:47:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:47:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:47:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:47:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:47:52 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:47:53 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:47:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:47:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:47:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:47:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:47:53 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:47:54 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:47:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:47:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:47:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:47:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:47:54 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:47:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:47:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:47:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:47:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:47:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:47:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:47:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:47:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:47:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:47:55 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 09:47:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:47:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:47:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:47:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:47:56 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:47:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:47:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:47:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:47:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:47:56 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:47:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:47:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:47:58 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:47:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:47:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:47:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:47:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:47:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:47:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:47:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:47:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:47:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:47:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:47:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:47:59 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:47:59 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:48:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:48:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:48:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:48:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:48:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:48:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:48:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:48:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:48:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:48:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:48:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:48:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:48:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:48:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:48:01 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:48:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:48:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:48:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:48:02 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:48:02 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:48:03 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:48:03 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:48:04 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:48:04 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:48:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:48:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:48:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:48:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:48:05 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:48:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:48:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:48:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:48:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:48:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:48:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:48:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:48:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:48:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:48:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:48:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:48:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:48:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:48:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:48:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:48:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:48:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:48:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:48:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:48:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:48:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:48:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:48:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:48:10 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:48:10 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:48:10 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:48:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:48:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:48:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:48:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:48:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:48:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:48:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:48:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:48:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:48:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:48:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:48:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:48:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:48:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:48:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:48:13 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:48:13 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:48:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:48:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:48:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:48:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:48:14 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:48:14 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:48:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:48:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:48:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:48:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:48:15 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:48:15 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:48:16 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:48:16 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:48:17 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:48:17 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:48:18 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:48:18 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:48:19 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:48:19 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:48:19 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:48:20 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:48:20 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:48:21 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:48:21 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:48:22 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:48:22 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:48:23 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:48:23 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:48:24 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:48:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:48:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:48:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:48:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:48:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:48:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:48:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:48:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:48:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:48:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:48:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:48:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:48:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:48:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:48:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:48:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:48:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:48:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:48:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:48:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:48:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:48:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:48:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:48:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:48:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:48:30 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:48:30 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:48:30 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:48:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:48:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:48:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:48:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:48:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:48:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:48:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:48:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:48:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:48:30 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 09:48:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:48:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:48:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:48:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:48:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:48:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:48:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:48:30 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:48:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:48:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:48:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:48:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:48:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:48:31 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:48:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:48:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:48:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:48:32 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:48:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:48:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:48:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:48:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:48:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:48:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:48:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:48:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:48:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:48:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:48:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:48:32 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:48:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:48:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:48:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:48:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:48:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:48:33 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:48:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:48:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:48:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:48:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:48:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:48:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:48:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:48:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:48:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:48:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:48:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:48:37 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:48:37 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:48:39 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:48:39 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:48:40 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:48:40 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:48:41 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:48:41 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:48:42 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:48:42 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:48:43 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:48:43 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:48:44 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:48:44 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:48:44 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:48:45 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:48:45 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:48:46 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:48:46 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:48:47 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:48:47 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:48:48 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:48:48 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:48:49 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:48:49 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:48:50 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:48:50 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:48:51 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 09:48:51 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 09:48:52 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 09:48:52 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 09:48:52 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 09:48:53 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 09:48:53 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 09:48:54 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 09:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:48:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:48:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:48:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:48:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:48:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:48:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:48:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:48:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:48:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:48:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:48:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:48:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:48:54 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5469 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:48:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:48:54 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5469 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:48:54 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5469 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:48:54 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5469 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:48:54 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5469 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:48:54 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5469 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:48:54 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5469 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:48:54 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5469 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:48:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:48:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:48:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:48:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:48:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:48:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:48:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:48:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:48:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:48:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:48:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:48:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:49:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:49:00 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:49:00 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:49:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:49:00 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:49:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:49:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:49:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:49:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:49:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:49:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:49:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:49:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:49:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:49:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:49:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:49:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:49:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:49:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:49:01 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:49:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:49:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:49:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:49:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:49:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:49:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:49:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:49:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:49:03 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:49:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:49:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:49:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:49:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:49:03 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:49:04 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:49:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:49:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:49:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:49:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:49:04 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:49:05 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:49:05 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:49:06 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:49:06 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:49:07 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:49:07 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:49:08 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:49:08 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:49:09 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:49:09 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:49:11 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:49:11 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:49:12 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:49:12 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:49:13 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:49:13 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:49:14 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:49:14 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:49:15 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:49:15 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:49:16 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:49:16 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:49:17 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:49:17 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:49:17 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:49:18 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:49:18 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:49:19 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:49:19 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:49:20 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:49:20 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:49:21 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 09:49:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:49:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:49:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:49:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:49:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:49:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:49:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:49:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:49:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:49:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:49:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:49:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:49:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:49:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:49:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:49:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:49:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:49:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:49:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:49:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:49:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:49:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:49:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:49:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:49:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:49:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:49:27 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:49:27 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:49:27 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:49:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:49:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:49:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:49:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:49:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:49:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:49:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:49:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:49:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:49:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:49:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:49:28 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:49:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:49:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:49:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:49:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:49:29 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:49:29 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:49:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:49:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:49:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:49:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:49:30 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:49:30 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:49:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:49:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:49:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:49:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:49:30 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:49:31 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:49:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:49:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:49:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:49:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:49:31 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:49:32 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:49:32 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:49:33 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:49:33 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:49:34 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:49:34 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:49:35 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:49:35 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:49:36 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:49:36 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:49:37 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:49:37 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:49:38 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:49:38 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:49:38 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:49:39 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:49:39 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:49:40 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:49:40 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:49:41 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:49:41 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:49:42 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:49:42 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:49:43 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:49:43 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:49:44 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:49:44 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:49:45 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:49:45 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:49:45 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:49:46 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:49:46 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:49:47 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:49:47 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:49:48 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 09:49:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:49:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:49:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:49:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:49:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:49:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:49:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:49:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:49:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:49:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:49:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:49:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:49:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:49:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:49:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:49:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:49:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:49:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:49:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:49:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:49:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:49:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:49:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:49:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:49:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:49:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:49:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:49:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:49:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:49:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:49:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:49:54 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:49:54 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:49:54 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:49:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:49:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:49:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:49:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:49:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:49:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:49:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:49:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:49:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:49:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:49:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:49:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:49:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:49:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:49:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:49:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:49:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:49:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:49:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:49:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:49:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:49:56 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:49:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:49:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:49:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:49:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:49:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:49:57 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:49:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:49:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:49:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:49:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:49:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:49:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:49:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:49:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:49:59 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:49:59 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:50:00 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:50:00 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:50:01 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:50:01 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:50:02 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:50:02 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:50:03 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:50:03 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:50:04 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:50:04 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:50:06 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:50:06 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:50:06 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:50:07 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:50:07 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:50:08 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:50:08 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:50:09 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:50:09 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:50:10 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:50:10 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:50:11 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:50:11 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:50:12 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:50:12 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:50:13 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:50:13 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:50:13 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:50:14 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:50:14 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:50:15 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 09:50:15 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 09:50:16 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 09:50:16 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 09:50:17 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 09:50:17 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 09:50:18 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 09:50:18 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 09:50:19 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 09:50:19 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 09:50:20 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 09:50:20 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 09:50:21 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 09:50:21 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 09:50:21 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 09:50:22 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 09:50:22 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 09:50:23 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 09:50:23 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 09:50:24 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 09:50:24 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 09:50:25 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 09:50:25 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 09:50:26 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 09:50:26 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 09:50:27 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 09:50:27 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 09:50:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:50:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:50:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:50:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:50:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:50:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:50:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:50:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:50:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:50:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:50:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:50:27 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=7399 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:50:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:50:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:50:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:50:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:50:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:50:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:50:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:50:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:50:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:50:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:50:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:50:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:50:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:50:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:50:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:50:33 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:50:33 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:50:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:50:33 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:50:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:50:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:50:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:50:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:50:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:50:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:50:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:50:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:50:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:50:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:50:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:50:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:50:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:50:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:50:34 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:50:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:50:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:50:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:50:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:50:35 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:50:35 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:50:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:50:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:50:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:50:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:50:36 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:50:36 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:50:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:50:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:50:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:50:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:50:37 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:50:37 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:50:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:50:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:50:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:50:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:50:38 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:50:38 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:50:38 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:50:39 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:50:39 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:50:40 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:50:40 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:50:41 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:50:41 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:50:42 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:50:42 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:50:43 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:50:43 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:50:44 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:50:44 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:50:45 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:50:45 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:50:46 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:50:46 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:50:46 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:50:47 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:50:47 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:50:48 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:50:48 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:50:49 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:50:49 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:50:50 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:50:50 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:50:51 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:50:51 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:50:52 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:50:52 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:50:53 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:50:53 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:50:53 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:50:54 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 09:50:54 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 09:50:55 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 09:50:55 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 09:50:56 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 09:50:56 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 09:50:57 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 09:50:57 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 09:50:58 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 09:50:58 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 09:50:59 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 09:50:59 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 09:51:00 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 09:51:00 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 09:51:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:51:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:51:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:51:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:51:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:51:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:51:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:51:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:51:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:51:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:51:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:51:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:51:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:51:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:51:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:51:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:51:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:51:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:51:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:51:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:51:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:51:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:51:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:51:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:51:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:51:06 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:51:06 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:51:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:51:06 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:51:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:51:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:51:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:51:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:51:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:51:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:51:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:51:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:51:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:51:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:51:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:51:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:51:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:51:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:51:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:51:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:51:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:51:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:51:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:51:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:51:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:51:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:51:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:51:12 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:51:12 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:51:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:51:12 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:51:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:51:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:51:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:51:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:51:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:51:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:51:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:51:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:51:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:51:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:51:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:51:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:51:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:51:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:51:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:51:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:51:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:51:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:51:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:51:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:51:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:51:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:51:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:51:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:51:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:51:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:51:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:51:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:51:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:51:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:51:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:51:17 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:51:17 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:51:17 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:51:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:51:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:51:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:51:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:51:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:51:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:51:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:51:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:51:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:51:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:51:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:51:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:51:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:51:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:51:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:51:23 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:51:23 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:51:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:51:23 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:51:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:51:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:51:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:51:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:51:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:51:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:51:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:51:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:51:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:51:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:51:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:51:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:51:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:51:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:51:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:51:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:51:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:51:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:51:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:51:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:51:25 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:51:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:51:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:51:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:51:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:51:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:51:26 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:51:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:51:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:51:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:51:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:51:26 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:51:27 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:51:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:51:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:51:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:51:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:51:27 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:51:28 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:51:28 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:51:29 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:51:29 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:51:30 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:51:30 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:51:31 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:51:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:51:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:51:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:51:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:51:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:51:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:51:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:51:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:51:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:51:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:51:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:51:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:51:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:51:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:51:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:51:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:51:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:51:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:51:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:51:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:51:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:51:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:51:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:51:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:51:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:51:36 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:51:36 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:51:36 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:51:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:51:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:51:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:51:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:51:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:51:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:51:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:51:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:51:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:51:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:51:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:51:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:51:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:51:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:51:38 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:51:39 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:51:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:51:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:51:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:51:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:51:39 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:51:40 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:51:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:51:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:51:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:51:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:51:40 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:51:40 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:51:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:51:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:51:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:51:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:51:41 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:51:41 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:51:42 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:51:42 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:51:43 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:51:43 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:51:44 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:51:44 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:51:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:51:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:51:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:51:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:51:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:51:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:51:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:51:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:51:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:51:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:51:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:51:44 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:51:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:51:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:51:44 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:51:44 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:51:44 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:51:44 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:51:44 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:51:44 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:51:44 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:51:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:51:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:51:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:51:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:51:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:51:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:51:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:51:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:51:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:51:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:51:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:51:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:51:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:51:50 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:51:50 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:51:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:51:50 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:51:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:51:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:51:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:51:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:51:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:51:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:51:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:51:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:51:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:51:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:51:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:51:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:51:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:51:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:51:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:51:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:51:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:51:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:51:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:51:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:51:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:51:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:51:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:51:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:51:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:51:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:51:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:51:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:51:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:51:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:51:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:51:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:51:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:51:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:51:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:51:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:51:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:51:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:51:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:51:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:51:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:51:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:51:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:51:57 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:51:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:51:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:51:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:51:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:51:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:51:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:51:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:51:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:51:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:51:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:51:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:51:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:51:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:51:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:52:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:52:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:52:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:52:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:52:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:52:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:52:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:52:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:52:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:52:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:52:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:52:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:52:04 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:52:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:52:04 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:52:04 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:52:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:52:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:52:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:52:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:52:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:52:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:52:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:52:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:52:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:52:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:52:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:52:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:52:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:52:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:52:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:52:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:52:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:52:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:52:09 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:52:09 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:52:10 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:52:10 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:52:10 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:52:11 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:52:11 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:52:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:52:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:52:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:52:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:52:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:52:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:52:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:52:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:52:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:52:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:52:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:52:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:52:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:52:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:52:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:52:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:52:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1865 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:52:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:52:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:52:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:52:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:52:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:52:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:52:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:52:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:52:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:52:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:52:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:52:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:52:17 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:52:17 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:52:17 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:52:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:52:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:52:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:52:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:52:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:18 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:52:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:52:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:19 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:52:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:52:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:20 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:52:20 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:52:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:21 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:52:21 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:52:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:22 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:52:22 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:52:23 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:52:23 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:52:24 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:52:24 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:52:25 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:52:25 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:52:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:52:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:52:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:52:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:52:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:52:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:52:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:52:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:52:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:52:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1864 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:52:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1864 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:52:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1864 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:52:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1864 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:52:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1864 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:52:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1864 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:52:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1864 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:52:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1864 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:52:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:52:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:52:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:52:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:52:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:52:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:52:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:52:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:52:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:52:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:52:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:52:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:52:31 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:52:31 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:52:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:52:31 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:52:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:52:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:52:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:52:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:52:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:52:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:52:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:52:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:52:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:52:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:52:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:52:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:33 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:52:33 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:52:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:52:34 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:52:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:34 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:52:35 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:52:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:35 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:52:36 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:52:36 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:52:37 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:52:37 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:52:38 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:52:38 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:52:39 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:52:39 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:52:40 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:52:40 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:52:41 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:52:41 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:52:41 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:52:42 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:52:42 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:52:43 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:52:43 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:52:44 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:52:44 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:52:45 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:52:45 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:52:46 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:52:46 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:52:47 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:52:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:52:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:52:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:52:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:52:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:52:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:52:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:52:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:52:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:52:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:52:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:52:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:52:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:52:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:52:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:52:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:52:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:52:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:52:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:52:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:52:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:52:52 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:52:52 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:52:52 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:52:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:52:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:52:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:52:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:52:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:52:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:52:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:52:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:52:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:55 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:52:56 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:52:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:56 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:52:57 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:52:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:52:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:52:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:52:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:52:57 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:52:57 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:52:58 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:52:58 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:52:59 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:52:59 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:53:00 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:53:00 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:53:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:53:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:53:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:53:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:53:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:53:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:53:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:53:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:53:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:53:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:53:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:53:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:53:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:53:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:53:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:53:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:53:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:53:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:53:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:53:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:53:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:53:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:53:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:53:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:53:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:53:06 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:53:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:53:06 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:53:06 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:53:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:53:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:53:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:53:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:53:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:53:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:53:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:53:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:53:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:53:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:53:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:53:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:53:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:53:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:53:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:53:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:53:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:53:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:53:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:53:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:53:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:53:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:53:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:53:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:53:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:53:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:53:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:53:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:53:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:53:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:53:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:53:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:53:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:53:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:53:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:53:11 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:53:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:53:12 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:53:12 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:53:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:53:13 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:53:13 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:53:14 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:53:14 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:53:15 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:53:15 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:53:16 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:53:16 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:53:17 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:53:17 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:53:18 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:53:18 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:53:19 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:53:19 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:53:20 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:53:20 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:53:20 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:53:21 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:53:21 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:53:22 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:53:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:53:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:53:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:53:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:53:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:53:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:53:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:53:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:53:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:53:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:53:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:53:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:53:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:53:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:53:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:53:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:53:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:53:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:53:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:53:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:53:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:53:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:53:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:53:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:53:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:53:28 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:53:28 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:53:28 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:53:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:53:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:53:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:53:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:53:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:53:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:53:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:53:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:53:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:53:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:53:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:53:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:53:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:53:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:53:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:53:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:53:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:53:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:53:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:53:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:53:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:53:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:53:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:53:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:53:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:53:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:53:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:53:33 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:53:33 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:53:33 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:53:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:53:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:53:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:53:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:53:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:53:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:53:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:53:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:53:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:53:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:53:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:53:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:53:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:53:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:53:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:53:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:53:39 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:53:39 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:53:39 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:53:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:53:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:53:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:53:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:53:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:53:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:53:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:53:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:53:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:53:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:53:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:53:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:53:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:53:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:53:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:53:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:53:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:53:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:53:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:53:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:53:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:53:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:53:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:53:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:53:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:53:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:53:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:53:44 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:53:44 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:53:44 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:53:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:53:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:53:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:53:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:53:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:53:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:53:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:53:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:53:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:53:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:53:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:53:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:53:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:53:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:53:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:53:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:53:50 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:53:50 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:53:50 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:53:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:53:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:53:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:53:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:53:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:53:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:53:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:53:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:53:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:53:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:53:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:53:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:53:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:53:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:53:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:53:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:53:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:53:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:53:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:53:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:53:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:53:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:53:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:53:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:53:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:53:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:53:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:53:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:53:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:53:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:53:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:53:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:53:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:53:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:53:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:53:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:53:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:53:56 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:53:56 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:53:56 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:53:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:53:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:53:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:53:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:53:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:53:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:53:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:53:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:53:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:53:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:53:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:53:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:53:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:53:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:53:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:53:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:53:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:53:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:54:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:54:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:54:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:54:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:54:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:54:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:54:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:54:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:54:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:54:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:54:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:54:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:54:01 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:54:01 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:54:01 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:54:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:54:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:54:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:54:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:54:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:54:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:54:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:54:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:54:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:54:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:54:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:54:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:54:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:54:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:54:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:54:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:54:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:54:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:54:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:54:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:54:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:54:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:54:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:54:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:54:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:54:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:54:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:54:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:54:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:54:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:54:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:54:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:54:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:54:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:54:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:54:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:54:08 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:54:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:54:09 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:54:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:54:10 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:54:10 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 09:54:11 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 09:54:11 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 09:54:11 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 09:54:12 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 09:54:12 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 09:54:13 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 09:54:13 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 09:54:14 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 09:54:14 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 09:54:15 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 09:54:15 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 09:54:16 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 09:54:16 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 09:54:17 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 09:54:17 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 09:54:18 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 09:54:18 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 09:54:19 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 09:54:19 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 09:54:19 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 09:54:20 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 09:54:20 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 09:54:21 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 09:54:21 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 09:54:22 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 09:54:22 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 09:54:23 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 09:54:23 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 09:54:24 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 09:54:24 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 09:54:25 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 09:54:25 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 09:54:26 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 09:54:26 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 09:54:26 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 09:54:27 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 09:54:27 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 09:54:28 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 09:54:28 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 09:54:29 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 09:54:29 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 09:54:30 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 09:54:30 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 09:54:31 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 09:54:31 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 09:54:32 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 09:54:32 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 09:54:33 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 09:54:33 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 09:54:34 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 09:54:34 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 09:54:34 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 09:54:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:54:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:54:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:54:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:54:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:54:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:54:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:54:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:54:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:54:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:54:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:54:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:54:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:54:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:54:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:54:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:54:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:54:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:54:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:54:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:54:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:54:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:54:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:54:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:54:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:54:40 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:54:40 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:54:40 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:54:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:54:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:54:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:54:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:54:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:54:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:54:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:54:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:54:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:54:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:54:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:54:42 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:54:43 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:54:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:54:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:54:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:54:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:54:43 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:54:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:54:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:54:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:54:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:54:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:54:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:54:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:54:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:54:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:54:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:54:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:54:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:54:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:54:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:54:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:54:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:54:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:54:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:54:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:54:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:54:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:54:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:54:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:54:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:54:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:54:49 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:54:49 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:54:49 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:54:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:54:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:54:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:54:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:54:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:54:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:54:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:54:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:54:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:54:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:54:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:54:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:54:51 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:54:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:54:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:54:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:54:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:54:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:54:52 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:54:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:54:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:54:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:54:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:54:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:54:53 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:54:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:54:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:54:54 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:54:54 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:54:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:54:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:54:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:54:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:54:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:54:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:54:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:54:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:54:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:54:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:54:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:55:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:55:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:55:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:55:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:55:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:55:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:55:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:55:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:55:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:55:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:55:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:55:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:55:00 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:55:00 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:55:00 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:55:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:55:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:55:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:55:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:02 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:55:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:55:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:03 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:55:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:55:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:04 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:55:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:55:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:05 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:55:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:55:06 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:55:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:55:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:55:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:55:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:55:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:55:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:55:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:55:06 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1425 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:06 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1425 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:06 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1425 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:06 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1425 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:06 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1425 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:06 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1425 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:06 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1425 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:06 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1425 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:55:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:55:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:55:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:55:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:55:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:55:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:55:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:55:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:55:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:55:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:55:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:55:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:55:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:55:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:55:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:55:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:55:12 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:55:12 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:55:12 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:55:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:55:12 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:55:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:55:13 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:55:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:14 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:55:14 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:55:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:15 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:55:15 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:55:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:16 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:55:16 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:55:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:17 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:55:17 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:55:18 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:55:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:55:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:55:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:55:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:55:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:55:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:55:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:55:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:55:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:55:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:55:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:55:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:55:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:55:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:55:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:55:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:55:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:55:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:55:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:55:24 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:55:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:55:24 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:55:24 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:55:24 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:55:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:25 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:55:25 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:55:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:25 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:55:26 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:55:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:26 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:55:27 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:55:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:27 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:55:28 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:55:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:28 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:55:29 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:55:29 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:55:30 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:55:30 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:55:31 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:55:31 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:55:32 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:55:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:55:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:55:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:55:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:55:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:55:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:55:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1863 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:55:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1863 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1863 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1863 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1863 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1863 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:55:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:55:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:55:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:55:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:55:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:55:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:55:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:55:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:55:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:55:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:55:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:55:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:55:37 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:55:37 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:55:37 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:55:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:55:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:55:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:55:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:39 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:55:40 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:55:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:40 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:55:40 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:55:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:41 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:55:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:55:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:55:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:55:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:55:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:55:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:55:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:55:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:55:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:55:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:55:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:55:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:55:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:55:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:55:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:55:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:55:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:55:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:55:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:55:47 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:55:47 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:55:47 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:55:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:55:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:55:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:55:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:55:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:55:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:55:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:55:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:55:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:55:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:55:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:55:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:55:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:55:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:55:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:55:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:55:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:55:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:55:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:55:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:55:52 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:55:52 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:55:52 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:55:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:55:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:55:52 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:55:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:55:52 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:52 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:52 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:52 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:52 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:52 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:52 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:55:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:55:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:55:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:55:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:55:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:55:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:55:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:55:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:55:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:55:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:55:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:55:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:55:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:55:58 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:55:58 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:55:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:55:58 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:55:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:55:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:55:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:55:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:55:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:55:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:55:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:55:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:55:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:55:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:55:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:55:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:55:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:56:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:56:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:56:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:56:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:56:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:56:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:56:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:56:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:56:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:56:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:56:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:56:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:56:04 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:56:04 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:56:04 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:56:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:56:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:56:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:56:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:56:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:56:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:56:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:56:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:56:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:56:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:56:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:56:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:56:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:56:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:56:07 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:56:07 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-24 09:56:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:56:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:56:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:56:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:56:07 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:56:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:56:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:56:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:56:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:56:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:56:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:56:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:56:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:56:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:56:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:56:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:56:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:56:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:56:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:56:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:56:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:56:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:56:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:56:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:56:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:56:12 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:56:12 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:56:12 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:56:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:56:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:56:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:56:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:56:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:56:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:56:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:14 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:56:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:56:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:15 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:56:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:56:15 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-24 09:56:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:56:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:56:15 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:56:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:16 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:56:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:56:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:56:16 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:56:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:56:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:56:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:56:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:56:16 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=924 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:56:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:56:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:56:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:56:16 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=924 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:56:16 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=924 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:56:16 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=924 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:56:16 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=924 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:56:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:56:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:56:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:56:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:56:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:56:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:56:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:56:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:56:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:56:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:56:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:56:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:56:22 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:56:22 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:56:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:56:22 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:56:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:56:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:56:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:56:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:56:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:56:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:56:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:56:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:56:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:56:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:56:23 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:56:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:56:24 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:56:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:56:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:56:25 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-24 09:56:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:56:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:56:25 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:56:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:25 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:56:26 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:56:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:26 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:56:27 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:56:27 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:56:28 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:56:28 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:56:29 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:56:29 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:56:29 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:56:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:56:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:56:30 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:56:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:56:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:56:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:56:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:56:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:56:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:56:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:56:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:56:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:56:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:56:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:56:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:56:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:56:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:56:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:56:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:56:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:56:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:56:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:56:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:56:35 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:56:35 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:56:35 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:56:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:56:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:56:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:56:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:56:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:56:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:56:37 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:56:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:56:38 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:56:38 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-24 09:56:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:56:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:56:38 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:56:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:56:39 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:56:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:40 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:56:40 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:56:41 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:56:41 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:56:42 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:56:42 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:56:43 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:56:43 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:56:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:56:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:56:43 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:56:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:56:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:56:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:56:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:56:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:56:43 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1868 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:56:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:56:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:56:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:56:43 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1868 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:56:43 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1868 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:56:43 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1868 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:56:43 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1868 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:56:43 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1868 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:56:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:56:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:56:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:56:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:56:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:56:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:56:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:56:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:56:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:56:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:56:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:56:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:56:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:56:49 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:56:49 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:56:49 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:56:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:56:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:56:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:56:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:56:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:56:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:56:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:56:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:56:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:56:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:56:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:56:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:56:51 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:56:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:56:52 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:56:52 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-24 09:56:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:56:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:56:52 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:56:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:52 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:56:53 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:56:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:53 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:56:54 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:56:54 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:56:55 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:56:55 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:56:56 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:56:56 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:56:57 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:56:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:56:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:56:57 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:56:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:56:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:56:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:56:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:56:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:56:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:56:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:56:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:56:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:56:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:56:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:56:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:56:57 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1868 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:56:57 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1868 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:56:57 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1868 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:56:57 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1868 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:56:57 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1868 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:57:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:57:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:57:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:57:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:57:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:57:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:57:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:57:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:57:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:57:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:57:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:57:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:57:02 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:57:02 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:57:02 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:57:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:57:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:57:02 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:57:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:57:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:57:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:03 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:57:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:57:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:04 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:57:05 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:57:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:05 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:57:06 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:57:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:06 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:57:07 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:57:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:07 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:57:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:57:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:57:07 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:57:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:57:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:57:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:57:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:57:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:57:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:57:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:57:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:57:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:57:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:57:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:57:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:57:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:57:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:57:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:57:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:57:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:57:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:57:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:57:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:57:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:57:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:57:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:57:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:57:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:57:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:57:13 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:57:13 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:57:13 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:57:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:57:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:57:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:57:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:57:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:57:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:57:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:57:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:57:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:57:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:57:16 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-24 09:57:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:57:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:57:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:57:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:57:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:57:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:57:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:57:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:57:18 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:57:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:57:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:57:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:57:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:57:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:57:18 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1215 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:57:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:57:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:57:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:57:18 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1215 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:57:18 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1215 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:57:18 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1215 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:57:18 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1215 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:57:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:57:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:57:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:57:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:57:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:57:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:57:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:57:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:57:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:57:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:57:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:57:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:57:24 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:57:24 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:57:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:57:24 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:57:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:57:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:57:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:57:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:57:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:57:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:57:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:57:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:57:24 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:57:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:25 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:57:25 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:57:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:26 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:57:26 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:57:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:26 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:57:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:57:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:57:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:57:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:57:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:57:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:57:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:57:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:57:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:57:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:57:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:57:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:57:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:57:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:57:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:57:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:57:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:57:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:57:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:57:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:57:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:57:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:57:32 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:57:32 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:57:32 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:57:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:57:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:57:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:57:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:57:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:33 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:57:34 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:57:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:34 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:57:35 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:57:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:35 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:57:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:57:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:57:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:57:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:57:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:57:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:57:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:57:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:57:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:57:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:57:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:57:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:57:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:57:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:57:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:57:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:57:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:57:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:57:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:57:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:57:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:57:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:57:41 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:57:41 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:57:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:57:41 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:57:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:57:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:57:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:57:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:57:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:57:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:57:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:57:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:57:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:57:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:57:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:57:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:57:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:57:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:57:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:57:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:57:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:57:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:57:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:57:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:57:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:57:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:57:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:57:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:57:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:57:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:57:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:57:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:57:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:57:47 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:57:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:57:47 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:57:47 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:57:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:57:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:57:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:57:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:57:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:57:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:57:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:57:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:57:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:57:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:57:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:57:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:57:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:57:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:57:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:57:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:57:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=164 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:57:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:57:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=164 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:57:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=164 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:57:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:57:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:57:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:57:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:57:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:57:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:57:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:57:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:57:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:57:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:57:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:57:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:57:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:57:53 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:57:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:57:53 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:57:53 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:57:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:57:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:57:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:57:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:57:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:57:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:57:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:57:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:57:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:57:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:57:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:57:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:57:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:57:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:55 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:57:56 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:57:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:56 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:57:57 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:57:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:57:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:57:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:57:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:57:57 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:57:58 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:57:58 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:57:59 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:57:59 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:58:00 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:58:00 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:58:01 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:58:01 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:58:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:58:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:58:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:58:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:58:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:58:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:58:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:58:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:58:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:58:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:58:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:58:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:58:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:58:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:58:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:58:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:58:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:58:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:58:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:58:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:58:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:58:07 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:58:07 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:58:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:58:07 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:58:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:58:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:58:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:58:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:58:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:58:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:58:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:58:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:58:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:58:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:58:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:58:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:58:09 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:58:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:10 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:58:10 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:58:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:11 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:58:11 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:58:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:12 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:58:12 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:58:13 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:58:13 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:58:13 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:58:14 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:58:14 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:58:15 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:58:15 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 09:58:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:58:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:58:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:58:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:58:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:58:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:58:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:58:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:58:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:58:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:58:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:58:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:58:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:58:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:58:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:58:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:58:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:58:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:58:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:58:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:58:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:58:21 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:58:21 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:58:21 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:58:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:58:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:58:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:58:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:58:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:58:23 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:58:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:58:24 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:58:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:58:24 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 09:58:24 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-24 09:58:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:58:24 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:58:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:58:25 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:58:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:25 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:58:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:58:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:58:25 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 09:58:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:58:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:58:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:58:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:58:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:58:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1007 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:58:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:58:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1007 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1007 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1007 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1007 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1007 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1007 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1007 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:58:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:58:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:58:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:58:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:58:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:58:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:58:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:58:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:58:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:58:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:58:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:58:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:58:31 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:58:31 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:58:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:58:31 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:58:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:58:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:58:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:58:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:58:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:58:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:58:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=145 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:58:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=145 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=145 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=145 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=145 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=145 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=145 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=145 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:58:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:58:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:58:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:58:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:58:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:58:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:58:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:58:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:58:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:58:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:58:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:58:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:58:37 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:58:37 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:58:37 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:58:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:58:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:58:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:58:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:58:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:38 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:58:39 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:58:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:39 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:58:40 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:58:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:40 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:58:41 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:58:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:41 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:58:42 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:58:42 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:58:43 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:58:43 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:58:44 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:58:44 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:58:45 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:58:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:58:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:58:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:58:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:58:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:58:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:58:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:58:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:58:45 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1860 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:45 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1860 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:45 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1860 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:45 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1860 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:45 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1860 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:45 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1860 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:45 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1860 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:58:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:58:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:58:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:58:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:58:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:58:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:58:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:58:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:58:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:58:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:58:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:58:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:58:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:58:50 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:58:50 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:58:50 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:58:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:58:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:58:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:58:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:58:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:58:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:58:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 09:58:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 09:58:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 09:58:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 09:58:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 09:58:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 09:58:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 09:58:57 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 09:58:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 09:58:58 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 09:58:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 09:58:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:58:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:58:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:58:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:58:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:58:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:58:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:58:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:58:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:58:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:58:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:58:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:58:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1861 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1861 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1861 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1861 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1861 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:58:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1861 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:59:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:59:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:59:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:59:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:59:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:59:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:59:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:59:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:59:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:59:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:59:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:59:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:59:04 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:59:04 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:59:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:59:04 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:59:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:59:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:59:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:59:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:06 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:59:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:59:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:07 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:59:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:59:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:59:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:59:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:59:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:59:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:59:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:59:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:59:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:59:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:59:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:59:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:59:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:59:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:59:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:59:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:59:12 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:59:12 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:59:12 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:59:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:59:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:59:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:59:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:59:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:59:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:59:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:59:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:59:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:59:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:59:13 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=209 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:59:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:59:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:59:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:59:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:59:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:59:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:59:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:59:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:59:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:59:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:59:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:59:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:59:18 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:59:18 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:59:18 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:59:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:59:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:59:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:59:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:59:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:59:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:59:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:59:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:59:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:59:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:59:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:59:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:59:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:59:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:59:24 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:59:24 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:59:24 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:59:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:59:24 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:59:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:25 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:59:25 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:59:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:26 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:59:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:59:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:59:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:59:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=550 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=550 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=550 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=550 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=550 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=550 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=550 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=550 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:59:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:59:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:59:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:59:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:59:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:59:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:59:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:59:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:59:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:59:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:59:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:59:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:59:32 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:59:32 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:59:32 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:59:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:59:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:59:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:59:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:59:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:59:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:59:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:59:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:59:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:59:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:59:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:59:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:33 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:59:34 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:59:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:34 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:59:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:59:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:59:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:59:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:59:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:59:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=721 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=721 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=721 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=721 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=721 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=721 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:34 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:59:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:59:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:59:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:59:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:59:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:59:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:59:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:59:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:59:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:59:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:59:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:59:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:59:40 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:59:40 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:59:40 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:59:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:59:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:59:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:59:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:59:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:59:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:59:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:59:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:59:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:59:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:59:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:59:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:42 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:59:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:59:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:59:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:59:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:59:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:59:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:59:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:59:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:59:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:59:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:59:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:59:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:59:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:59:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:59:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:59:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:59:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:59:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:59:48 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:59:48 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:59:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:59:48 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:59:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:59:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:59:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:59:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:59:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:59:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:59:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:59:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:59:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:59:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:59:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:59:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:59:50 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 09:59:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:50 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 09:59:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:59:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:59:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:59:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:59:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:59:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=721 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=721 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=721 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=721 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=721 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=721 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:59:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:59:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 09:59:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:59:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 09:59:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:59:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 09:59:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:59:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 09:59:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 09:59:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 09:59:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 09:59:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 09:59:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 09:59:56 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 09:59:56 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 09:59:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 09:59:56 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 09:59:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:59:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:59:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 09:59:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 09:59:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 09:59:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 09:59:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 09:59:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 09:59:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 09:59:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 09:59:57 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 09:59:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:58 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 09:59:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 09:59:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 09:59:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 09:59:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 09:59:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 09:59:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 09:59:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 09:59:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 09:59:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 09:59:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 09:59:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 09:59:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 09:59:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:00:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:00:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:00:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:00:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:00:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:00:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:00:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:00:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:00:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:00:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:00:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:00:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:00:04 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:00:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:00:04 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:00:04 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:00:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:00:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:00:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:00:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:00:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:00:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:00:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:00:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:00:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:00:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:00:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:00:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:00:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:00:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:00:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:00:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:00:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:00:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:00:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:00:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:00:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:00:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:00:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:00:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:00:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:00:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:00:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:00:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:00:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:00:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:00:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:00:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:00:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:00:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:00:13 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:00:13 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:00:13 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:00:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:00:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:00:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:00:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:00:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:00:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:00:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:00:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:00:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:00:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:00:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:00:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:00:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:00:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:00:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:00:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:00:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:00:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:00:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:00:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:00:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:00:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:00:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:00:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:00:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:00:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:00:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:00:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:00:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:00:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:00:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:00:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:00:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:00:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:00:22 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:00:22 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:00:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:00:22 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:00:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:00:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:00:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:00:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:00:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:00:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:00:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:00:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:00:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:00:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:00:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:00:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:00:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:00:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:00:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:00:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:00:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:00:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:00:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:00:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:00:30 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:00:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:00:30 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:00:30 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:00:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:00:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:00:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:00:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:00:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:00:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:00:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:00:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:00:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:00:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:00:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:00:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:00:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:00:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:00:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=772 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:00:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=772 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:00:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=772 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:00:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=772 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:00:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=772 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:00:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=772 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:00:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=772 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:00:33 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=772 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:00:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:00:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:00:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:00:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:00:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:00:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:00:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:00:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:00:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:00:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:00:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:00:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:00:39 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:00:39 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:00:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:00:39 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:00:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:00:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:00:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:00:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:00:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:00:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:00:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:00:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:00:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:00:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:00:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:00:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:00:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:00:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:00:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:00:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:00:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:00:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:00:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:00:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:00:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:00:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:00:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:00:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:00:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:00:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:00:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:00:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:00:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:00:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:00:44 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:00:44 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:00:44 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:00:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:00:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:00:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:00:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:00:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:00:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:00:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:00:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:00:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:00:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:00:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:00:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:00:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:00:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:00:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:00:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:00:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:00:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:00:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:00:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:00:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:00:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:00:53 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:00:53 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:00:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:00:53 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:00:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:00:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:00:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:00:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:00:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:00:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:00:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:00:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:00:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:00:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:00:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:00:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:00:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:00:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:00:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:00:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:00:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:00:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:00:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:00:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:00:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:00:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:00:58 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:00:58 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:00:58 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:00:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:00:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:00:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:01:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:01:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:01:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:01:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:01:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:01:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:01:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:01:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:01:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:01:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:01:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:01:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:01:04 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:01:04 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:01:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:04 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:01:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:01:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:01:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:01:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:01:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:01:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:01:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:01:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:01:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:01:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:01:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:01:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:01:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:01:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:01:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:01:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:01:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:01:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:01:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:01:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:01:10 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:01:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:10 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:01:10 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:01:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:01:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:01:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:01:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:01:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:01:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:01:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:01:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=116 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:01:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:01:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:01:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:01:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:01:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:01:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:01:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:01:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:01:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:01:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:01:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:01:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:01:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:01:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:01:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:01:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:01:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:01:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:01:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:01:15 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:01:15 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:15 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:01:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:01:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:01:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:01:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:01:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:01:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:01:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:01:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:01:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:01:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:01:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:01:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:01:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:01:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:01:21 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:01:21 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:01:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:21 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:01:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:01:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:01:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:01:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:01:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:01:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:01:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:01:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:01:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:01:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:01:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:01:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:01:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:01:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:01:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:01:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:01:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:01:23 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:01:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:01:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:01:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:01:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:01:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:01:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:01:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:01:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:01:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:01:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:01:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:01:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:01:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:01:24 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:01:25 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:01:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:01:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:01:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:01:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:01:25 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:01:26 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:01:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:01:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:01:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:01:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:01:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:01:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:01:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:01:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:01:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:01:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:01:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:01:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:01:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:01:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:01:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:01:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:01:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:01:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:01:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:01:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:01:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:01:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:01:31 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:01:31 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:31 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:01:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:01:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:01:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:01:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:01:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:01:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:01:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:01:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:01:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:01:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:01:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:01:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:01:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:01:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:01:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:01:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:01:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:01:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:01:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:01:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:01:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:01:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:01:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:01:37 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:01:37 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:37 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:01:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:01:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:01:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:01:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:01:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:01:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:01:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:01:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:01:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:01:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:01:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:01:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:01:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:01:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:01:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:01:43 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:01:43 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:43 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:01:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:01:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:01:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:01:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:01:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:01:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:01:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:01:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:01:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:01:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:01:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:01:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:01:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:01:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:01:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:01:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:01:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:01:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:01:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:01:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:01:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:01:48 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:48 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:01:48 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:01:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:01:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:01:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:01:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:01:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:01:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:01:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:01:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:01:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:01:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:01:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:01:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:01:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:01:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:01:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:01:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:01:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:01:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:01:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:01:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:01:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:01:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:01:54 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:01:54 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:01:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:54 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:01:54 [DEBUG] fake_trx.py:376 (BTS@172.18.90.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-24 10:01:54 [INFO] fake_trx.py:379 (BTS@172.18.90.20:5700) Artificial TRXC delay set to 200
2024-10-24 10:01:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-24 10:01:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:01:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:01:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:01:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:01:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:01:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:01:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:01:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:01:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:56 [DEBUG] fake_trx.py:376 (BTS@172.18.90.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-24 10:01:56 [INFO] fake_trx.py:379 (BTS@172.18.90.20:5700) Artificial TRXC delay set to 0
2024-10-24 10:01:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-24 10:01:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:01:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:01:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:01:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:01:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:01:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:01:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:01:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:01:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:01:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:01:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:01:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:01:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:01:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:01:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:02:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:02:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:02:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:02:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:02:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:02:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:02:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:02:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:02:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:02:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:02:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:02:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:02:01 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:02:01 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:01 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:02:01 [DEBUG] fake_trx.py:376 (BTS@172.18.90.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-24 10:02:01 [INFO] fake_trx.py:379 (BTS@172.18.90.20:5700) Artificial TRXC delay set to 200
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-24 10:02:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:02:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:02:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:02:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:02:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:02:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:03 [DEBUG] fake_trx.py:376 (BTS@172.18.90.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-24 10:02:03 [INFO] fake_trx.py:379 (BTS@172.18.90.20:5700) Artificial TRXC delay set to 0
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:02:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:02:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:02:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:02:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:02:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:02:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:02:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:02:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:02:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:02:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:02:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:02:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:02:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:02:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:02:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:02:08 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:02:08 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:08 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:02:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:02:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:02:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:02:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:02:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:02:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:02:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:02:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:02:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:02:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:02:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:02:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:02:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:02:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:02:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:02:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:02:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:02:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:02:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:02:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:02:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:02:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:02:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:02:14 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:02:14 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:02:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:14 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:02:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:02:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:02:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:02:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:02:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:02:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:02:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:02:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:02:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:02:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:02:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:02:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:02:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:02:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:02:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:02:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:02:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:02:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:02:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:02:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:02:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:02:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:02:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:02:19 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:02:20 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:02:20 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:20 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:02:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:02:20 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:02:21 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:02:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:02:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:02:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:02:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:02:21 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:02:22 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:02:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:02:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:02:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:02:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:02:22 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:23 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:02:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:02:23 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:02:24 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:02:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:02:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:02:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:02:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:02:24 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:02:25 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:02:25 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:02:26 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:02:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:26 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:02:27 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:02:27 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:02:27 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:02:28 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:02:28 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:02:29 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:29 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:02:30 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:02:30 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:30 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:02:30 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:30 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:02:31 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:02:31 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:02:32 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:02:32 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:02:33 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:02:33 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:33 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:02:33 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:33 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:02:33 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:34 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:02:34 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:02:34 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:02:35 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:02:35 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:02:36 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:02:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:36 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:02:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:36 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:02:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:02:36 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:02:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:37 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:02:37 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:02:38 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 10:02:38 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 10:02:39 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 10:02:39 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 10:02:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:39 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:02:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:02:39 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:02:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:40 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:02:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:02:40 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:02:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:40 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 10:02:40 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 10:02:41 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:41 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:41 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:42 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 10:02:42 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 10:02:42 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 10:02:43 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 10:02:43 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 10:02:44 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:44 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:45 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 10:02:45 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 10:02:46 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 10:02:46 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 10:02:47 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 10:02:47 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 10:02:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:48 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 10:02:48 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 10:02:49 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 10:02:49 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 10:02:50 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 10:02:50 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 10:02:50 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 10:02:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:51 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 10:02:51 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:02:51 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:52 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:02:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:52 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:02:52 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:02:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:52 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 10:02:52 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 10:02:53 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 10:02:53 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 10:02:54 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 10:02:54 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:55 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:02:55 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:55 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:55 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:02:55 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:55 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 10:02:56 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-24 10:02:56 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-24 10:02:57 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-24 10:02:57 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-24 10:02:57 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-24 10:02:58 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-24 10:02:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:58 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:02:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:02:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:02:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:02:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:02:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:02:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:02:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:02:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:02:58 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:02:58 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:02:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:02:58 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-24 10:02:59 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-24 10:02:59 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-24 10:03:00 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-24 10:03:00 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-24 10:03:01 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-24 10:03:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:01 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:03:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:03:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:03:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:03:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:03:01 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:03:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:01 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-24 10:03:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:02 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:03:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:03:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:03:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:03:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:02 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:03:02 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:03:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:02 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-24 10:03:02 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-24 10:03:03 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-24 10:03:03 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-24 10:03:04 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-24 10:03:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:04 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:03:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:03:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:03:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:03:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:03:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:03:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:03:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:03:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:03:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:03:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:03:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:03:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:03:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:03:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:03:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:03:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:03:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:03:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:03:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:03:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:03:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:03:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:03:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:03:10 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:03:10 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:03:10 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:03:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:03:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:03:10 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:10 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:03:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:10 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:03:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:03:10 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:10 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:03:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:03:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:03:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:03:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:03:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:03:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:03:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:03:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:03:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:03:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:03:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:03:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:03:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:03:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:03:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:03:16 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:03:16 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:03:16 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:03:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:03:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:03:16 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:03:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:03:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:17 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:03:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:03:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:03:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:03:17 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:03:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:18 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:03:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:03:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:03:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:03:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:03:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:03:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:03:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:03:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:03:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:03:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:03:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:03:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:03:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:03:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:03:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:03:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:03:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:03:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:03:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:03:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:03:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:03:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:03:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:03:23 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:03:23 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:03:23 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:03:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:03:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:03:23 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:24 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:24 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:03:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:03:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:03:24 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:25 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:03:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:03:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:03:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:03:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:03:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:25 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:03:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:03:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:03:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:03:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:03:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:03:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:03:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:03:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:03:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=495 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:03:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:03:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:03:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:03:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=495 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:03:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=495 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:03:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=495 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:03:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=495 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:03:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=495 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:03:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=495 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:03:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=495 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:03:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:03:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:03:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:03:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:03:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:03:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:03:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:03:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:03:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:03:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:03:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:03:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:03:31 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:03:31 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:31 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:03:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:03:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:03:31 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:31 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:03:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:03:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:03:31 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:03:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:03:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:03:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:03:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:03:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:32 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:03:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:03:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:03:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:03:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:03:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:03:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:03:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:03:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:03:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:03:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:03:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=495 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:03:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:03:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=495 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:03:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=495 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:03:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=495 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:03:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=495 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:03:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=495 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:03:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=495 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:03:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=495 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:03:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:03:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:03:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:03:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:03:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:03:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:03:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:03:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:03:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:03:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:03:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:03:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:03:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:03:38 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:03:38 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:03:38 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:03:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:03:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:03:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:03:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:03:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:03:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:03:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:03:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:03:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:03:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:03:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:03:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:03:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:03:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:03:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:03:40 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:40 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:03:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:03:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:03:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:03:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:03:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:03:41 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:03:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:03:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:03:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:03:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:03:42 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:03:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:42 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:03:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:03:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:03:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:42 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:03:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:03:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:03:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:03:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:03:42 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:03:43 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:03:43 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:03:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:03:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:03:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:03:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:03:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:03:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:03:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:03:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:03:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:03:44 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:03:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:03:44 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:03:44 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:03:45 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:03:45 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:03:46 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:03:46 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:03:47 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:03:47 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:03:48 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:03:48 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:03:49 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:03:49 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:03:50 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:03:50 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:03:50 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:03:51 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:03:51 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:03:52 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:03:52 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:03:53 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:03:53 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:03:54 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:03:54 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:03:55 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:03:55 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:03:56 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:03:56 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 10:03:57 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 10:03:57 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 10:03:57 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 10:03:58 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 10:03:58 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 10:03:59 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 10:03:59 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 10:04:00 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 10:04:00 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 10:04:01 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 10:04:01 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 10:04:02 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 10:04:02 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 10:04:03 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 10:04:03 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 10:04:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:03 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:04:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:04:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:04:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:04:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:04:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:04:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:04:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:04:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:04:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:04:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:04:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:04:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:04:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:04:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:04:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:04:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:04:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:04:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:04:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:04:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:04:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:04:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:04:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:04:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:04:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:04:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:04:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:04:09 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:04:09 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:09 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:04:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:04:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:04:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:04:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:04:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:04:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:04:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:04:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:04:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:04:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:04:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:04:11 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:04:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:04:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:04:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:11 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:04:11 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:11 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:04:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:04:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:04:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:04:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:04:12 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:04:12 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:04:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:04:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:04:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:04:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:04:13 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:04:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:13 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:04:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:04:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:04:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:04:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:13 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:04:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:04:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:04:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:04:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:04:14 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:04:14 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:04:15 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:04:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:04:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:04:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:04:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:04:15 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:04:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:15 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:04:16 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:04:16 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:04:16 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:04:17 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:04:17 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:04:18 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:04:18 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:04:19 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:04:19 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:04:20 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:04:20 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:04:21 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:04:21 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:04:22 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:04:22 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:04:23 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:04:23 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:04:24 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:04:24 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:04:24 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:04:25 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:04:25 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:04:26 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:04:26 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:04:27 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:04:27 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 10:04:28 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 10:04:28 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 10:04:29 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 10:04:29 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 10:04:30 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 10:04:30 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 10:04:31 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 10:04:31 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 10:04:31 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 10:04:32 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 10:04:32 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 10:04:33 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 10:04:33 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 10:04:34 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 10:04:34 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 10:04:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:35 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:04:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:04:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:04:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:04:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:04:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:04:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:04:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:04:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:04:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:04:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:04:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:04:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:04:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:04:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:04:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:04:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:04:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:04:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:04:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:04:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:04:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:04:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:04:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:04:40 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:04:40 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:40 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:04:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:04:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:04:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:04:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:04:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:04:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:04:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:04:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:04:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:04:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:04:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:04:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:04:42 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:04:43 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:04:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:04:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:43 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:04:43 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:04:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:04:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:04:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:04:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:04:44 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:04:44 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:04:45 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:04:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:04:45 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:45 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:04:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:04:45 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:04:45 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:46 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:04:46 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:04:47 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:04:47 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:48 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:04:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:04:48 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:48 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:48 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:04:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:04:48 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:48 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:04:49 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:04:49 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:04:50 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:04:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:50 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:04:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:04:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:04:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:04:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:50 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:04:51 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:04:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:04:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:04:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:04:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:51 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:04:51 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:04:52 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:04:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:04:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:52 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:04:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:53 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:04:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:04:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:53 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:04:54 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:04:54 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:04:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:04:55 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:55 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:04:55 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:04:56 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:04:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:56 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:04:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:04:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:04:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:04:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:04:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:04:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:04:56 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:04:56 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:04:56 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:04:57 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:04:57 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:04:58 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:04:58 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:04:58 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 10:04:59 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 10:04:59 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 10:05:00 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 10:05:00 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 10:05:01 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 10:05:01 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 10:05:02 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 10:05:02 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 10:05:03 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 10:05:03 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 10:05:04 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 10:05:04 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 10:05:05 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 10:05:05 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 10:05:06 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 10:05:06 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 10:05:06 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 10:05:07 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 10:05:07 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 10:05:08 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 10:05:08 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 10:05:09 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 10:05:09 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 10:05:10 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 10:05:10 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 10:05:11 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 10:05:11 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 10:05:12 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 10:05:12 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 10:05:13 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 10:05:13 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 10:05:13 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 10:05:14 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 10:05:14 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 10:05:15 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 10:05:15 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 10:05:16 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 10:05:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:16 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:05:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:05:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:05:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:05:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:05:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:05:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:05:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:05:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:05:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:05:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:05:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:05:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:05:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:05:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:05:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:05:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:05:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:05:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:05:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:05:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:05:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:05:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:05:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:05:22 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:05:22 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:22 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:05:22 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:22 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:05:22 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:22 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:05:22 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:23 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:05:23 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:23 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:05:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:05:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:05:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:05:23 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=378 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:05:23 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=378 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:05:23 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=378 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:05:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:05:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:05:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:05:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:05:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:05:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:05:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:05:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:05:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:05:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:05:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:05:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:05:28 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:05:28 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:05:28 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:05:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:05:29 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:30 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:30 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:05:30 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:30 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:30 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:31 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:31 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:05:31 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:32 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:05:32 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:32 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:32 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:05:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:05:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:05:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:05:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=905 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:05:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=905 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:05:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=905 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:05:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=905 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:05:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=905 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:05:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=905 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:05:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=905 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:05:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=905 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:05:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:05:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:05:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:05:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:05:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:05:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:05:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:05:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:05:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:05:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:05:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:05:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:05:38 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:05:38 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:38 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:05:38 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:38 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:05:38 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:38 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:05:39 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:39 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:05:39 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:39 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:05:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:05:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:05:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:05:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:05:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:05:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:05:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:05:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:05:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:05:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:05:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:05:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:05:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:05:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:05:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:05:45 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:05:45 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:45 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:05:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:05:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:05:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:05:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:05:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:05:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:05:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:05:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:05:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:05:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:05:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:05:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:05:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:05:47 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:05:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:05:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:05:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:05:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:05:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:05:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:48 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:05:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:05:48 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:05:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:05:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:05:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:05:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:05:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:05:49 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:05:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:49 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:05:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:05:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:05:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:05:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:05:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:05:50 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:05:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:05:50 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:05:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:05:51 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:05:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:51 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:05:51 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:05:52 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:05:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:52 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:05:52 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:05:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:05:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:05:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:05:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:05:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:05:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:52 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:05:52 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:05:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:53 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:05:53 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:05:54 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:05:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:05:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:05:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:05:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:05:54 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:05:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:05:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:05:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:05:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:05:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:05:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:05:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:05:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:05:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:05:54 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2141 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:05:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:05:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:05:54 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2141 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:05:54 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2141 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:05:54 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2141 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:05:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:05:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:05:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:05:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:05:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:05:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:05:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:05:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:05:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:05:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:05:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:05:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:06:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:06:00 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:06:00 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:00 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:06:00 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:00 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:06:00 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:06:01 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:06:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:01 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:06:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:06:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:06:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:06:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:06:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:06:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:06:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:06:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:06:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:06:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:06:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:06:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:06:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:06:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:06:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:06:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:06:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:06:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:06:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:06:07 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:06:07 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:06:07 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:06:07 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:07 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:06:08 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:06:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:08 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:06:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:06:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:06:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:06:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:06:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:06:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:06:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:06:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:06:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:06:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:06:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:06:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:06:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:06:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:06:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:06:14 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:06:14 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:14 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:06:14 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:14 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:06:15 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:06:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:15 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:06:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:06:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:06:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:06:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=445 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=445 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=445 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=445 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=445 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=445 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=445 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=445 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:06:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:06:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:06:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:06:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:06:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:06:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:06:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:06:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:06:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:06:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:06:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:06:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:06:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:06:21 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:21 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:06:21 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:06:21 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:21 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:06:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:06:22 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:06:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:06:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:06:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:23 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:06:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:06:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:06:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:06:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:06:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:06:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:06:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:06:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:06:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:06:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:06:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:06:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:06:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:06:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:06:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:06:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:06:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:06:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:06:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:06:28 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:06:28 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:28 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:06:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:06:29 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:06:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:06:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:29 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:06:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:29 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:06:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:30 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:06:30 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:06:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:30 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:06:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:31 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:06:31 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:06:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:32 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:06:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:32 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:06:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:06:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:06:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:06:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:06:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:06:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:06:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=990 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:06:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=990 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=990 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:06:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:06:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:06:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:06:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:06:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:06:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:06:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:06:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:06:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:06:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:06:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:06:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:06:38 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:06:38 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:38 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:06:38 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:06:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:39 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:06:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:06:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:06:40 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:06:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:40 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:06:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:40 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:06:41 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:06:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:41 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:06:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:42 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:06:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:06:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:06:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:06:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:06:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:06:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:06:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:06:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:06:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:06:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:06:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:06:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:06:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:06:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:06:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:06:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:06:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:06:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:06:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:06:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:06:47 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:06:47 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:47 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:06:48 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:48 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:06:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:06:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:49 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:06:49 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:50 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:06:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:50 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:06:51 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:06:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:51 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:06:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:51 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:06:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:06:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:06:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:06:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:06:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:06:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:06:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:06:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:06:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:06:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:06:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:06:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:06:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:06:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:06:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:06:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:06:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:06:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:06:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:06:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:06:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:06:57 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:57 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:06:57 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:06:57 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:58 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:06:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:06:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:06:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:06:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:06:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:06:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:06:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:06:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:06:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:06:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:06:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:06:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:06:59 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:06:59 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:06:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:06:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:06:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:06:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:06:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:06:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:07:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:07:00 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:07:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:07:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:07:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:07:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:07:01 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:01 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:07:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:07:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:07:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:07:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:07:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:07:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:07:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:07:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:07:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:07:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:07:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:07:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:07:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:07:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:07:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:07:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:07:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:07:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:07:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:07:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:07:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:07:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:07:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:07:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:07:07 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:07:07 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:07 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:07:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:07:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:07:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:07:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:07:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:07:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:07:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:07:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:07:07 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:07:07 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:07 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:07 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:07 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:07 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:07 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:07 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:07:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:07:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:07:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:07:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:07:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:07:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:07:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:07:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:07:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:07:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:07:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:07:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:07:12 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:07:12 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:12 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:07:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:07:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:07:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:07:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:12 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:07:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:07:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:07:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:07:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:07:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:07:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:07:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:07:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:07:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:07:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:07:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:07:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:07:18 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:07:18 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:07:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:18 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:07:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:07:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:07:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:07:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:07:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:07:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:07:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:07:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:07:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:07:18 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:07:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:07:18 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:18 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:18 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:18 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:18 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:18 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:07:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:07:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:07:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:07:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:07:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:07:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:07:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:07:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:07:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:07:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:07:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:07:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:07:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:07:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:07:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:07:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:07:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:07:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:07:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:07:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:07:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:07:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:07:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:07:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:07:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:07:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:07:28 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:07:28 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:28 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:07:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:07:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:07:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:07:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:07:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:07:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:30 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:07:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:07:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:07:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:07:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:07:30 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:07:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:31 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:07:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:07:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:07:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:07:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:07:31 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:07:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:32 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:07:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:07:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:07:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:07:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:07:32 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:07:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:33 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:07:33 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:33 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:33 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:33 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:07:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:34 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:07:34 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-24 10:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:34 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:07:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:34 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:07:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:34 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:35 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:07:35 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:36 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:07:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:07:36 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:07:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:36 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:37 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:07:37 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:37 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:07:37 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:37 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:07:37 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:38 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:07:38 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:07:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:38 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:07:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:38 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:07:38 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:07:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:39 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:07:39 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:07:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:39 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:07:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:07:39 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:07:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:40 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:07:40 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:40 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:07:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:07:40 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:07:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:40 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:07:41 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:07:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:41 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:07:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:41 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:07:41 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:07:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:41 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:07:42 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:07:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:42 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:07:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:42 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:07:42 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:07:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:42 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:07:43 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:43 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:07:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:07:43 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:43 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:07:44 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:44 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:07:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:07:44 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:07:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:44 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:07:45 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:45 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:07:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:07:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:07:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:07:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:07:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:07:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:07:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:07:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:07:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:07:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:07:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:07:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:07:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:07:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:07:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:07:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:07:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:07:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:07:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:07:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:07:50 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:07:50 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:50 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:07:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:07:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:07:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:07:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:07:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:07:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:07:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:07:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:07:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:07:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:07:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:07:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:07:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:07:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:07:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:07:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:07:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:07:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:07:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:07:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:07:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:07:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:07:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:07:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:07:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:07:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:07:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:08:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:08:00 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:08:01 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:08:01 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:08:02 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:08:02 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:08:03 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:08:03 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:08:04 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:08:04 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:08:05 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:08:05 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:08:05 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:08:06 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:08:06 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:08:07 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:08:07 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:08:08 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:08:08 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:08:09 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:08:09 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:08:10 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:08:10 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:08:11 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:08:11 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:08:12 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:08:12 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:08:13 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:08:13 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:08:13 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:08:14 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:08:14 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:08:15 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:08:15 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 10:08:16 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 10:08:16 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 10:08:17 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 10:08:17 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 10:08:18 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 10:08:18 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 10:08:19 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 10:08:19 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 10:08:20 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 10:08:20 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 10:08:21 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 10:08:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:08:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:08:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:08:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:08:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:08:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:08:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:08:21 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5213 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:08:21 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5213 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:08:21 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5213 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:08:21 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5213 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:08:21 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5213 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:08:21 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5213 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:08:21 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5213 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:08:21 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5213 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:08:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:08:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:08:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:08:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:08:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:08:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:08:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:08:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:08:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:08:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:08:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:08:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:08:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:08:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:08:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:08:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:08:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:08:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:08:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:08:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:08:30 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:08:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:08:31 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:08:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:08:32 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:08:32 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:08:33 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:08:33 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:08:34 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:08:34 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:08:35 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:08:35 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:08:35 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:08:36 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:08:36 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:08:37 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:08:37 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:08:38 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:08:38 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:08:39 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:08:39 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:08:40 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:08:40 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:08:41 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:08:41 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:08:42 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:08:42 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:08:43 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:08:43 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:08:43 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:08:44 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:08:44 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 10:08:45 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 10:08:45 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 10:08:46 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 10:08:46 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 10:08:47 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 10:08:47 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 10:08:48 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 10:08:48 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 10:08:49 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 10:08:49 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 10:08:50 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 10:08:50 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 10:08:51 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 10:08:51 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 10:08:51 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 10:08:52 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 10:08:52 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 10:08:53 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 10:08:53 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 10:08:54 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 10:08:54 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 10:08:55 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 10:08:55 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 10:08:56 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 10:08:56 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 10:08:57 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 10:08:57 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 10:08:58 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 10:08:58 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 10:08:59 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 10:08:59 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 10:08:59 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 10:09:00 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 10:09:00 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 10:09:01 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 10:09:01 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 10:09:02 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 10:09:02 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-24 10:09:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:09:03 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-24 10:09:03 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-24 10:09:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:09:04 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-24 10:09:04 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-24 10:09:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:09:05 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-24 10:09:05 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-24 10:09:06 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-24 10:09:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:09:06 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-24 10:09:07 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-24 10:09:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:09:07 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-24 10:09:07 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-24 10:09:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:09:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:09:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:09:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:09:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:09:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:09:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:09:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:09:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:09:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:09:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:09:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:09:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:09:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:09:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:09:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:09:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:09:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:09:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:09:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:09:13 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:09:13 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:09:13 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:09:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:09:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:09:13 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:09:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:09:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:09:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:09:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:09:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:09:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:09:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:09:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:09:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:09:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:09:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:09:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:09:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:09:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:09:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:09:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:09:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:09:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:09:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:09:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:09:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:09:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:09:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:09:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:09:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:09:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:09:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:09:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:09:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:09:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:09:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:09:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:09:17 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:09:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:09:17 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:09:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:09:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:09:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:09:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:09:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:09:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:09:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:09:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:09:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:09:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:09:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:09:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:09:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:09:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:09:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:09:21 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:09:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:09:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:09:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:09:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:09:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:09:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:09:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:09:21 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:09:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:09:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:09:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:09:22 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:09:22 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:09:23 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:09:23 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:09:23 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:09:24 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:09:24 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:09:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:09:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:09:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:09:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:09:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:09:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:09:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:09:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:09:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:09:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:09:25 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:25 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:09:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:09:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:09:25 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:09:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:25 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:09:26 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:09:26 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:09:27 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:09:27 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:09:28 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:09:28 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:09:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:09:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:09:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:09:29 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:09:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:09:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:09:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:09:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:09:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:09:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:09:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:09:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:09:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:09:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:09:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:09:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:09:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:09:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:09:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:09:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:09:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:09:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:09:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:09:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:09:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:09:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:09:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:09:34 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:09:34 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:34 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:09:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:09:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:09:34 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:09:35 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:09:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:09:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:09:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:09:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:09:35 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:35 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:09:36 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:09:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:09:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:09:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:09:36 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:09:36 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:36 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:09:36 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:09:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:09:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:09:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:09:37 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:09:37 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:37 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:09:37 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:09:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:09:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:09:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:09:38 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:09:38 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:38 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:09:38 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:09:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:09:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:09:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:09:39 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:09:39 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:39 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:09:39 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:40 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:09:40 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:40 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:09:40 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:41 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:09:41 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:41 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:09:41 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:42 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:09:42 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:09:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:09:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:09:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:09:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:09:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:09:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:09:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:09:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:09:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:09:42 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:09:42 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:09:42 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:09:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:42 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:09:42 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:43 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:09:43 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:43 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:09:43 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:43 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:09:44 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:44 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:09:44 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:44 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:09:45 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:45 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:09:45 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:45 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:09:46 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:46 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:09:46 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:46 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:09:47 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:09:47 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:47 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:09:47 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:48 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:09:48 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:48 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:09:48 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:49 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:09:49 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:49 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:09:49 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:50 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:09:50 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:09:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:09:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:09:50 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:09:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:09:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:09:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:09:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:09:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:09:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:09:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:09:50 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:09:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:09:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:09:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:50 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:50 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:09:50 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:51 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:09:51 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:51 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:09:51 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:51 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:09:52 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:52 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:09:52 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:52 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 10:09:53 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:53 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 10:09:53 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:53 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 10:09:54 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:54 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 10:09:54 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:54 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 10:09:55 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:55 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 10:09:55 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:55 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 10:09:56 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:56 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 10:09:56 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:56 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 10:09:57 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:57 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 10:09:57 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:09:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:09:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:09:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:09:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:09:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:09:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:09:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:09:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:09:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:09:57 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:57 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 10:09:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:09:57 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:09:57 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:09:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:09:57 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:58 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 10:09:58 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:58 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 10:09:58 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:58 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 10:09:59 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:59 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 10:09:59 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:09:59 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 10:10:00 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:10:00 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 10:10:00 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:10:00 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 10:10:01 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:10:01 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 10:10:01 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:10:01 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 10:10:02 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:10:02 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 10:10:02 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:10:02 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 10:10:03 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:10:03 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 10:10:03 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:10:03 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 10:10:04 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:10:04 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 10:10:04 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:10:04 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 10:10:04 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:10:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:10:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:10:05 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:10:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:10:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:10:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:10:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:10:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:10:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:10:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:10:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:10:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:10:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:10:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:10:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:10:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:10:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:10:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:10:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:10:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:10:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:10:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:10:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:10:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:10:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:10:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:10:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:10:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:10:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:10:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:10:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:10:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:10:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:10:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:10:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:10:15 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:10:15 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:10:15 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:10:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:10:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:10:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:10:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:10:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:10:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:10:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:10:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:10:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:10:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:10:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:10:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:10:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:10:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:10:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:10:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:18 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:10:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:19 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:10:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:10:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:10:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:10:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:10:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:10:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:10:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:10:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:10:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:10:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:10:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:10:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:10:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:20 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:10:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:10:21 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:10:21 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:10:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:10:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:10:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:10:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:10:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:10:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:10:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:10:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:10:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:10:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:10:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:10:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:10:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:10:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:10:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:10:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:10:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:10:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:10:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:10:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:10:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:10:27 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:10:27 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:27 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:10:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:10:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:10:27 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:10:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:10:28 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:10:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:29 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:10:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:10:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:10:29 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:10:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:10:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:10:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:10:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:10:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:10:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:10:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:10:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:10:29 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:10:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:29 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:10:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:30 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:10:30 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:10:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:31 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:10:31 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:10:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:10:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:10:31 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:10:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:10:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:10:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:10:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:10:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:10:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:10:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:10:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1052 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:10:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1052 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:10:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1052 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:10:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1052 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:10:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1052 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:10:31 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1052 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:10:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:10:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:10:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:10:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:10:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:10:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:10:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:10:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:10:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:10:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:10:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:10:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:10:37 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:10:37 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:37 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:10:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:10:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:10:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:10:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:10:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:10:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:10:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:10:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:10:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:10:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:10:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:10:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:10:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:39 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:10:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:10:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:10:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:10:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:10:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:10:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:10:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:10:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:10:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:10:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:10:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:39 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:10:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:40 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:10:40 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:10:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:41 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:10:41 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:10:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:10:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:10:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:10:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:10:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:10:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:10:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:10:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:10:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:10:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:10:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:10:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:42 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:10:42 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:10:43 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:10:43 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:10:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:10:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:10:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:10:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:10:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:10:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:10:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:10:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:10:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:10:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:10:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:10:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:10:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:10:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:10:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:10:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:10:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:10:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:10:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:10:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:10:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:10:49 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:10:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:49 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:10:49 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:10:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:10:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:10:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:10:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:10:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:10:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:10:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:10:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:49 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:10:49 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:10:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:10:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:10:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:10:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:10:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:10:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:10:51 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:10:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:10:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:10:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:10:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:10:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:10:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:10:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:10:51 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:10:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:51 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:10:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:10:52 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:10:53 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:10:53 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:10:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:10:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:10:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:10:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:10:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:10:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:10:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:10:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:10:53 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1053 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:10:53 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1053 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:10:53 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1053 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:10:53 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1053 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:10:53 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1053 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:10:53 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1053 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:10:53 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1053 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:10:53 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1053 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:10:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:10:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:10:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:10:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:10:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:10:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:10:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:10:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:10:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:10:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:10:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:10:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:10:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:10:59 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:10:59 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:59 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:10:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:10:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:10:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:10:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:10:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:10:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:10:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:10:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:10:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:10:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:10:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:10:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:10:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:10:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:10:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:11:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:11:00 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:11:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:11:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:11:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:11:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:11:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:11:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:11:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:11:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:11:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:11:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:11:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:11:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:11:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=595 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:11:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=595 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:11:01 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=595 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:11:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:11:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:11:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:11:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:11:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:11:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:11:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:11:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:11:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:11:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:11:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:11:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:11:07 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:11:07 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:11:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:07 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:11:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:11:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:11:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:11:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:11:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:11:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:07 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:11:07 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:11:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:11:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:11:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:11:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:11:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:11:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:11:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:11:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:11:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:11:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:09 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:11:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:11:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:11:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:11:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:11:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:11:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:11:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:11:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:11:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:11:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:11:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:11:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:11:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:11:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:11:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:11:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:11:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:11:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:11:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:11:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:11:14 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:11:14 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:14 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:11:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:11:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:11:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:11:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:11:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:11:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:11:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:11:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:11:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:11:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:11:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:11:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:11:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:11:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:11:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:11:20 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:11:20 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:20 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:11:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:11:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:11:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:11:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:11:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:11:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:11:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:11:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:11:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:11:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:11:21 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=299 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:11:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:21 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=299 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:11:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:11:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:11:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:11:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:11:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:11:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:11:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:11:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:11:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:11:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:11:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:11:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:11:26 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:11:26 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:26 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:11:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:11:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:11:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:11:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:11:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:11:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:11:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:11:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:11:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:11:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:11:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:11:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:11:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:11:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:11:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:11:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:11:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:11:33 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:11:33 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:11:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:33 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:11:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:11:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:11:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:11:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:11:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:11:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:11:33 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:11:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:11:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:11:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:11:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:11:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:11:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:33 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:11:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:11:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:11:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:11:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:11:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:34 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:11:34 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:11:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:11:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:34 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:11:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:11:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:11:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:11:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:11:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:11:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:11:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:11:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:11:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:11:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:11:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:11:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:11:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:11:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:11:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:11:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:11:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:11:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:11:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:11:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:11:40 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:11:40 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:40 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:11:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:11:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:11:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:11:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:11:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:11:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:11:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:11:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:11:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:11:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:11:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:11:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:11:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:11:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:11:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:11:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:11:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:11:46 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:11:46 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:46 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:11:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:11:46 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:46 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:11:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:11:46 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:11:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:47 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:11:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:11:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:11:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:11:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:11:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:11:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:11:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:11:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=369 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:11:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=369 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:11:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=369 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:11:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=369 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:11:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=369 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:11:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=369 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:11:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=369 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:11:47 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=369 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:11:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:11:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:11:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:11:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:11:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:11:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:11:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:11:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:11:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:11:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:11:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:11:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:11:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:11:53 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:11:53 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:11:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:53 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:11:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:11:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:11:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:11:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:11:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:11:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:11:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:11:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:11:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:11:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:11:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:11:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:11:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:11:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:11:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:11:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:11:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:11:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:11:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:11:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:11:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:11:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:11:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:11:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 10:11:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 10:11:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:11:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:11:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:11:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:11:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:11:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:11:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:11:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:11:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:11:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:11:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:11:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:11:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:12:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:12:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:12:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:12:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:12:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:12:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:12:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:12:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:12:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:12:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:12:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:12:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:12:00 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:12:00 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:12:00 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:12:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:12:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:12:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:12:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:12:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:12:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:02 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:12:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:12:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:03 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:12:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:12:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:04 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:12:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:12:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:05 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:12:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:12:06 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:12:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:12:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:12:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:12:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:12:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:12:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 10:12:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:12:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:12:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:12:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:12:07 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:12:07 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:12:08 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:12:08 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:12:09 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:12:09 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:12:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:12:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:12:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:12:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:12:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:12:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:12:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:12:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:12:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:12:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:12:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:12:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:12:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:12:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:12:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:12:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:12:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:12:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:12:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:12:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:12:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:12:15 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:12:15 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:12:15 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:12:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:12:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:12:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:12:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:12:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:12:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:12:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:12:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:18 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:12:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:12:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:19 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:12:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:12:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:20 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:12:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:12:21 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:12:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:12:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:12:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:12:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:12:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:12:21 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 10:12:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:12:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:12:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:12:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:12:22 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:12:22 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:12:23 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:12:23 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:12:24 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:12:24 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:12:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:12:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:12:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:12:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:12:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:12:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:12:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:12:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:12:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:12:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:12:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:12:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:12:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:12:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:12:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:12:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:12:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:12:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:12:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:12:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:12:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:12:30 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:12:30 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:12:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:12:30 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:12:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:12:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:12:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:12:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:12:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:12:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:12:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:12:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:12:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:32 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:12:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:12:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:33 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:12:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:12:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:12:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:12:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:12:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:12:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:12:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:12:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:12:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:12:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:12:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 10:12:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:12:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:12:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:12:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:12:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:12:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:12:37 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:12:38 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:12:38 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:12:39 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:12:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:12:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:12:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:12:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:12:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:12:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:12:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2131 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:12:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2131 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:12:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:12:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:12:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:12:39 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:12:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:12:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:12:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:12:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:12:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:12:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:12:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:12:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:12:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:12:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:12:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:12:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:12:45 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:12:45 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:12:45 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:12:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:12:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:12:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:12:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:12:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:12:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:12:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:12:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:12:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:12:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:12:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:12:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:48 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:12:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:12:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:49 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:12:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:12:50 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:12:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:12:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:12:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:12:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:12:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:12:51 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:12:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 10:12:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:12:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:12:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:12:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:12:51 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:12:52 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:12:52 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:12:52 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:12:53 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:12:53 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:12:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:12:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:12:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:12:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:12:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:12:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:12:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:12:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:12:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:12:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:12:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:12:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:12:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:12:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:12:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:12:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:12:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:12:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:12:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:12:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:12:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:12:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:12:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:12:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:12:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:12:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:12:59 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:12:59 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:12:59 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:12:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:12:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:13:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:13:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:13:00 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:13:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:13:01 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:13:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:02 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:13:02 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:13:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:03 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:13:03 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:13:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:04 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:13:04 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:13:05 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:13:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:13:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:13:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:13:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:13:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:13:05 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:13:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD NOHANDOVER
2024-10-24 10:13:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:13:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:13:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:13:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:13:06 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:13:06 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:13:07 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:13:07 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:13:08 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:13:08 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:13:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:13:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:13:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:13:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:13:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:13:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:13:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:13:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:13:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2080 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:13:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:13:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2080 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:13:08 [WARNING] transceiver.py:250 (TRX2@172.18.90.20:5700/2) RX TRXD message (ver=1 fn=2080 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:13:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2080 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:13:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2080 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:13:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2080 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:13:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2080 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:13:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2080 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:13:08 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2080 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:13:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:13:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:13:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:13:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:13:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:13:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:13:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:13:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:13:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:13:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:13:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:13:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:13:14 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:13:14 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:13:14 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:13:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:13:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:13:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:13:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:13:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:13:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:13:17 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:13:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:13:18 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:13:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:13:19 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:13:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:13:20 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:13:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:13:21 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:13:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:13:22 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:13:22 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:13:23 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:13:23 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:13:24 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:13:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:13:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:13:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:13:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:13:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:13:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:13:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:13:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:13:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:13:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:13:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:13:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:13:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:13:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:13:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:13:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:13:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:13:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:13:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:13:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:13:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:13:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:13:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:13:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:13:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:13:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:13:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:13:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:13:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:13:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:13:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:13:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:13:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:13:34 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:13:34 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:13:34 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:13:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:13:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:13:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:13:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:13:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:13:36 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:13:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:36 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:13:37 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:13:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:37 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:13:38 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:13:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:38 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:13:39 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:13:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:39 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:13:39 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:13:40 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:13:40 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:13:41 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:13:41 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:13:42 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:13:42 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:13:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:13:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:13:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:13:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:13:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:13:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:13:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:13:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:13:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:13:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:13:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:13:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:13:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:13:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:13:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:13:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:13:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:13:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:13:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:13:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:13:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:13:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:13:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:13:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:13:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:13:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:13:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:13:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:13:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:13:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:13:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:13:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:13:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:13:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:13:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:13:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:13:53 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:13:53 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:13:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:13:53 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:13:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:13:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:13:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:13:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:13:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:13:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:13:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:13:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:13:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:13:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:13:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:13:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:13:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:13:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:56 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:13:56 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:13:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:57 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:13:57 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:13:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:13:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:13:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:13:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:13:58 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:13:58 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:13:59 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:13:59 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:14:00 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:14:00 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:14:00 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:14:01 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:14:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:14:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:14:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:14:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:14:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:14:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:14:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:14:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:14:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:14:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:14:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:14:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:14:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:14:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:14:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:14:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:14:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:14:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:14:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:14:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:14:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:14:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:14:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:14:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:14:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:14:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:14:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:14:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:14:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:14:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:14:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:14:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:14:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:14:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:14:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:14:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:14:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:14:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:14:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:14:12 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:14:12 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:14:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:14:12 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:14:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:14:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:14:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:14:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:14:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:14:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:14:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:14:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:14:12 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:14:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:14:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:14:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:14:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:14:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:14:13 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:14:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:14:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:14:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:14:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:14:13 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:14:14 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:14:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:14:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:14:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:14:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:14:14 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:14:15 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:14:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:14:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:14:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:14:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:14:15 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:14:16 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:14:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:14:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:14:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:14:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:14:16 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:14:17 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:14:17 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:14:18 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:14:18 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:14:19 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:14:19 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:14:20 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:14:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:14:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:14:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:14:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:14:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:14:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:14:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:14:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:14:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:14:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:14:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:14:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:14:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:14:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:14:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:14:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:14:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:14:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:14:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:14:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:14:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:14:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:14:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:14:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:14:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:14:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:14:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:14:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:14:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:14:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:14:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:14:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:14:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:14:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:14:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:14:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:14:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:14:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:14:30 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:14:30 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:14:30 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:14:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:14:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:14:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:14:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:14:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:14:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:14:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:14:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:14:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:14:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:14:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:14:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:14:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:14:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:14:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:14:33 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:14:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:14:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:14:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:14:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:14:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:14:34 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:14:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:14:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:14:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:14:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:14:34 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:14:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:14:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:14:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:14:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:14:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:14:35 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:14:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:14:36 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:14:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:14:37 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:14:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:14:38 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:14:38 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:14:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:14:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:14:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:14:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:14:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:14:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:14:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:14:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:14:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:14:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:14:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:14:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:14:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:14:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:14:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:14:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:14:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:14:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:14:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:14:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:14:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:14:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:14:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:14:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:14:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:14:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:14:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:14:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:14:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:14:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:14:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:14:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:14:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:14:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:14:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:14:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:14:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:14:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:14:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:14:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:14:49 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:14:49 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:14:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:14:49 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:14:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:14:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:14:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:14:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:14:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:14:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:14:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:14:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:14:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:14:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:14:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:14:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:14:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:14:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:14:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:14:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:14:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:14:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:14:51 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:14:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:14:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:14:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:14:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:14:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:14:52 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:14:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:14:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:14:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:14:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:14:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:14:53 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:14:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:14:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:14:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:14:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:14:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:14:54 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:14:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:14:55 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:14:55 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:14:56 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:14:56 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:14:57 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:14:57 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:14:58 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:14:58 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:14:59 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:14:59 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:15:00 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:15:00 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:15:01 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:15:01 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:15:02 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:15:02 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:15:03 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:15:03 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:15:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:15:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:15:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:15:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:15:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:15:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:15:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:15:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:15:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:15:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:15:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:15:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:15:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3170 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:15:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:15:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3170 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:15:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3170 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:15:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3170 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:15:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3170 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:15:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3170 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:15:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3170 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:15:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3170 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:15:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:15:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:15:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:15:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:15:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:15:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:15:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:15:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:15:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:15:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:15:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:15:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:15:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:15:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:15:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:15:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:15:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:15:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:15:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:15:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:15:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:15:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:15:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:15:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:15:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:15:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:15:14 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:15:14 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:15:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:15:14 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:15:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:15:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:15:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:15:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:15:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:15:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:15:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:15:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:15:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:15:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:15:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:15:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:15:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:15:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:15:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:15:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:15:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:15:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:15:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:15:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:15:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:15:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:15:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:15:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:15:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:15:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:15:17 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:15:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:15:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:15:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:15:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:15:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:15:18 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:15:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:15:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:15:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:15:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:15:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:15:19 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:15:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:15:20 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:15:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:15:21 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:15:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:15:22 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:15:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:15:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:15:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:15:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:15:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:15:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:15:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:15:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:15:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:15:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:15:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:15:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:15:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:15:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:15:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:15:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:15:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:15:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:15:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:15:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:15:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:15:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:15:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:15:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:15:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:15:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:15:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:15:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:15:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:15:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:15:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:15:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:15:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:15:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:15:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:15:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:15:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:15:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:15:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:15:32 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:15:32 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:15:32 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:15:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:15:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:15:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:15:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:15:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:15:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:15:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:15:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:15:33 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:15:34 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:15:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:15:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:15:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:15:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:15:34 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:15:35 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:15:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:15:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:15:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:15:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:15:35 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:15:36 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:15:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:15:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:15:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:15:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:15:36 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:15:36 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:15:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:15:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:15:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:15:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:15:37 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:15:37 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:15:38 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:15:38 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:15:39 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:15:39 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:15:40 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:15:40 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:15:41 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:15:41 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:15:42 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:15:42 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:15:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:15:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:15:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:15:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:15:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:15:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:15:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:15:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:15:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:15:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:15:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:15:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:15:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2301 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:15:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:15:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2301 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:15:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2301 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:15:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2301 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:15:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2301 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:15:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2301 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:15:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2301 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:15:42 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2301 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:15:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:15:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:15:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:15:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:15:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:15:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:15:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:15:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:15:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:15:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:15:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:15:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:15:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:15:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:15:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:15:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:15:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:15:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:15:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:15:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:15:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:15:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:15:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:15:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:15:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:15:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:15:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:15:53 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:15:53 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:15:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:15:53 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:15:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:15:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:15:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:15:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:15:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:15:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:15:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:15:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:15:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:15:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:15:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:15:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:15:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:15:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:15:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:15:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:15:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:15:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:15:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:15:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:15:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:15:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:15:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:15:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:15:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:15:56 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:15:56 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:15:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:15:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:15:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:15:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:15:57 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:15:57 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:15:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:15:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:15:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:15:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:15:58 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:15:58 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:15:59 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:15:59 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:15:59 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:16:00 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:16:00 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:16:01 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:16:01 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:16:02 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:16:02 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:16:03 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:16:03 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:16:04 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:16:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:16:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:16:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:16:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:16:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:16:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:16:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:16:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:16:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:16:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:16:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:16:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:16:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:16:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:16:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:16:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:16:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:16:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:16:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:16:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:16:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:16:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:16:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:16:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:16:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:16:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:16:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:16:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:16:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:16:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:16:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:16:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:16:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:16:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:16:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:16:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:16:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:16:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:16:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:16:15 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:16:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:16:15 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:16:15 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:16:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:16:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:16:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:16:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:16:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:16:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:16:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:16:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:16:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:16:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:16:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:16:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:16:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:16:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:16:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:16:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:16:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:16:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:16:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:16:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:16:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:16:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:16:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:16:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:16:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:16:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:16:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:16:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:16:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:16:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:16:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:16:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:16:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:16:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:16:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:16:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:16:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:16:19 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:16:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:16:20 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:16:21 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:16:21 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:16:22 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:16:22 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:16:23 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:16:23 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:16:23 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:16:24 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:16:24 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:16:25 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:16:25 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:16:26 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:16:26 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:16:27 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:16:27 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:16:28 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:16:28 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:16:29 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:16:29 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:16:30 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:16:30 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:16:30 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:16:31 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:16:31 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:16:32 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:16:32 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:16:33 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 10:16:33 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 10:16:34 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 10:16:34 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 10:16:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:16:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:16:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:16:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:16:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:16:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:16:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:16:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:16:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:16:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:16:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:16:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:16:35 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4476 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:16:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:16:35 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4476 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:16:35 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4476 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:16:35 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4476 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:16:35 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4476 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:16:35 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4476 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:16:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:16:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:16:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:16:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:16:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:16:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:16:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:16:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:16:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:16:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:16:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:16:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:16:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:16:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:16:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:16:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:16:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:16:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:16:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:16:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:16:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:16:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:16:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:16:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:16:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:16:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:16:45 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:16:45 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:16:45 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:16:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:16:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:16:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:16:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:16:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:16:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:16:47 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:16:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:16:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:16:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:16:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:16:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:16:48 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:16:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:16:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:16:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:16:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:16:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:16:49 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:16:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:16:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:16:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:16:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:16:49 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:16:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:16:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:16:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:16:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:16:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:16:50 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:16:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:16:51 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:16:51 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:16:52 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:16:52 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:16:53 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:16:53 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:16:54 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:16:54 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:16:55 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:16:55 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:16:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:16:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:16:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:16:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:16:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:16:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:16:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:16:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:16:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:16:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:16:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2286 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:16:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:16:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2286 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:16:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2286 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:16:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2286 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:16:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2286 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:16:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2286 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:16:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2286 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:16:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2286 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:17:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:17:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:17:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:17:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:17:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:17:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:17:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:17:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:17:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:17:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:17:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:17:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:17:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:17:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:17:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:17:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:17:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:17:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:17:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:17:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:17:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:17:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:17:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:17:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:17:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:17:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:17:06 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:17:06 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:17:06 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:17:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:17:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:17:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:17:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:17:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:17:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:17:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:17:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:17:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:17:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:17:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:17:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:17:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:17:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:17:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:17:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:17:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:17:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:17:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:17:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:17:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:17:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:17:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:17:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:17:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:17:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:17:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:17:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:17:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:17:11 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:17:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:17:11 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:17:12 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:17:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:17:13 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:17:13 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:17:14 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:17:14 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:17:15 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:17:15 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:17:16 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:17:16 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:17:17 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:17:17 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:17:18 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:17:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:17:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:17:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:17:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:17:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:17:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:17:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:17:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:17:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:17:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:17:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:17:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:17:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:17:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:17:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:17:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:17:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:17:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:17:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:17:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:17:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:17:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:17:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:17:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:17:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:17:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:17:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:17:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:17:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:17:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:17:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:17:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:17:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:17:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:17:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:17:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:17:29 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:17:29 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:17:29 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:17:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:17:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:17:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:17:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:17:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:17:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:17:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:17:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:17:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:17:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:17:29 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-24 10:17:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:17:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:17:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:17:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:17:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:17:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:17:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:17:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:17:30 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:17:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:17:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:17:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:17:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:17:30 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:17:31 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:17:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:17:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:17:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:17:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:17:31 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:17:32 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:17:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:17:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:17:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:17:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:17:32 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:17:33 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:17:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:17:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:17:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:17:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:17:33 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:17:34 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:17:34 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:17:35 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:17:35 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:17:35 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:17:36 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:17:36 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:17:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:17:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:17:37 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:17:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:17:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:17:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:17:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:17:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:17:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:17:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:17:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:17:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:17:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:17:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:17:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:17:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:17:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:17:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:17:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:17:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:17:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:17:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:17:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:17:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:17:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:17:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:17:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:17:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:17:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:17:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:17:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:17:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:17:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:17:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:17:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:17:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:17:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:17:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:17:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:17:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:17:47 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:17:47 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:17:47 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:17:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:17:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:17:47 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:17:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:17:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:17:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:17:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:17:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:17:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:17:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:17:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:17:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:17:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:17:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:17:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:17:49 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:17:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:17:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:17:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:17:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:17:50 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:17:50 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:17:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:17:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:17:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:17:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:17:51 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:17:51 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:17:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:17:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:17:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:17:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:17:52 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:17:52 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:17:53 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:17:53 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:17:54 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:17:54 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:17:55 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:17:55 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:17:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:17:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:17:55 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:17:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:17:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:17:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:17:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:17:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:17:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:17:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:17:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:17:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:17:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:17:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:17:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:17:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:17:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:17:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:17:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:17:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:17:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:17:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1866 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:18:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:18:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:18:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:18:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:18:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:18:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:18:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:18:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:18:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:18:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:18:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:18:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:18:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:18:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:18:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:18:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:18:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:18:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:18:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:18:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:18:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:18:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:18:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:18:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:18:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:18:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:18:06 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:18:06 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:18:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:18:06 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:18:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:18:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:18:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:18:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:18:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:18:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:18:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:18:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:18:06 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:18:06 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-24 10:18:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:18:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:18:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:18:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:18:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:18:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:18:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:18:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:18:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:18:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:18:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:18:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:18:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:18:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:18:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:18:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:18:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:18:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:18:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:18:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:18:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:18:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:18:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:18:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:18:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:18:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:18:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:18:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:18:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:18:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:18:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:18:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:18:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:18:11 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:18:12 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:18:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:18:13 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:18:13 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:18:14 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:18:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:18:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:18:14 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:18:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:18:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:18:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:18:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:18:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:18:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:18:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:18:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:18:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:18:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:18:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:18:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:18:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:18:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:18:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:18:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:18:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:18:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:18:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:18:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:18:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:18:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:18:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:18:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:18:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:18:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:18:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:18:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:18:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:18:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:18:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:18:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:18:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:18:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:18:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:18:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:18:24 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:18:25 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:18:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:18:25 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:18:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:18:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:18:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:18:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:18:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:18:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:18:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:18:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:18:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:18:25 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-24 10:18:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:18:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:18:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:18:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:18:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:18:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:18:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:18:25 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:18:26 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:18:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:18:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:18:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:18:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:18:26 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:18:27 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:18:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:18:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:18:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:18:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:18:27 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:18:28 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:18:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:18:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:18:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:18:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:18:28 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:18:29 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:18:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:18:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:18:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:18:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:18:29 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:18:30 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:18:30 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:18:31 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:18:31 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:18:31 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:18:32 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:18:32 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:18:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:18:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:18:33 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:18:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:18:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:18:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:18:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:18:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:18:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:18:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:18:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:18:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:18:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:18:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:18:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:18:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:18:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:18:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:18:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:18:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:18:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:18:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:18:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:18:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:18:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:18:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:18:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:18:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:18:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:18:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:18:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:18:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:18:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:18:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:18:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:18:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:18:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:18:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:18:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:18:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:18:43 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:18:43 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:18:43 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:18:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:18:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:18:43 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:18:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:18:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:18:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:18:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:18:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:18:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:18:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:18:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:18:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:18:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:18:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:18:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:18:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:18:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:18:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:18:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:18:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:18:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:18:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:18:46 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:18:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:18:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:18:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:18:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:18:47 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:18:47 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:18:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:18:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:18:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:18:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:18:48 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:18:48 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:18:49 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:18:49 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:18:50 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:18:50 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:18:51 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:18:51 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:18:52 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:18:52 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:18:52 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:18:53 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:18:53 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:18:54 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:18:54 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:18:55 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:18:55 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:18:56 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:18:56 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:18:57 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:18:57 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:18:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:18:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:18:57 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:18:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:18:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:18:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:18:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:18:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:18:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:18:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:18:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:18:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:18:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:18:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:19:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:19:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:19:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:19:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:19:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:19:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:19:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:19:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:19:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:19:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:19:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:19:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:19:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:19:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:19:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:19:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:19:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:19:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:19:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:19:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:19:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:19:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:19:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:19:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:19:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:19:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:19:08 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:19:08 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:19:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:19:08 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:19:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:19:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:19:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:19:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:19:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:19:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:19:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:19:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:19:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:19:08 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-24 10:19:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:19:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:19:08 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:19:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:19:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:19:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:19:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:19:09 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:19:09 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:19:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:19:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:19:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:19:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:19:10 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:19:10 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:19:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:19:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:19:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:19:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:19:11 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:19:11 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:19:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:19:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:19:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:19:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:19:12 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:19:12 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:19:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:19:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:19:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:19:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:19:12 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:19:13 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:19:13 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:19:14 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:19:14 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:19:15 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:19:15 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:19:16 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:19:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:19:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:19:16 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:19:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:19:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:19:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:19:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:19:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:19:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:19:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:19:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:19:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:19:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:19:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:19:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:19:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:19:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:19:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:19:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:19:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:19:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:19:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:19:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:19:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:19:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:19:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:19:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:19:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:19:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:19:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:19:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:19:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:19:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:19:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:19:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:19:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:19:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:19:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:19:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:19:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:19:26 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:19:26 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:19:26 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:19:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:19:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:19:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:19:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:19:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:19:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:19:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:19:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:19:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:19:28 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:19:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:19:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:19:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:19:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:19:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:19:29 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:19:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:19:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:19:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:19:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:19:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:19:30 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:19:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:19:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:19:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:19:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:19:30 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:19:31 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:19:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:19:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:19:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:19:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:19:31 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:19:32 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:19:32 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:19:33 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:19:33 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:19:33 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:19:34 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:19:34 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:19:35 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:19:35 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:19:36 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:19:36 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:19:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:19:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:19:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:19:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:19:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:19:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:19:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:19:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:19:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:19:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:19:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:19:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:19:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:19:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:19:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:19:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:19:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:19:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:19:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:19:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:19:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:19:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:19:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:19:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:19:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:19:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:19:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:19:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:19:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:19:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:19:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:19:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:19:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:19:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:19:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:19:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:19:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:19:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:19:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:19:47 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:19:47 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:19:47 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:19:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:19:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:19:47 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:19:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:19:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:19:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:19:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:19:48 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:19:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:19:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:19:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:19:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:19:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:19:49 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:19:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:19:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:19:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:19:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:19:50 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:19:50 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:19:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:19:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:19:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:19:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:19:51 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:19:51 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:19:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:19:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:19:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:19:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:19:52 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:19:52 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:19:53 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:19:53 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:19:54 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:19:54 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:19:55 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:19:55 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:19:56 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:19:56 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:19:56 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:19:57 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:19:57 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:19:58 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:19:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:19:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:19:58 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:19:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:19:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:19:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:19:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:19:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:19:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:19:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:19:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:19:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:19:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:19:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2513 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:19:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:19:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2514 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:19:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2514 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:19:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2514 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:19:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2514 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:19:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2514 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:19:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2514 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:19:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2514 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:19:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2514 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:20:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:20:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:20:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:20:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:20:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:20:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:20:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:20:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:20:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:20:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:20:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:20:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:20:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:20:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:20:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:20:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:20:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:20:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:20:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:20:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:20:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:20:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:20:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:20:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:20:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:20:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:20:09 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:20:09 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:20:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:20:09 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:20:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:20:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:20:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:20:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:20:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:20:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:20:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:20:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:20:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:20:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:20:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:20:11 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:20:11 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:20:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:20:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:20:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:20:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:20:12 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:20:12 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:20:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:20:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:20:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:20:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:20:13 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:20:13 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:20:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:20:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:20:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:20:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:20:13 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:20:14 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:20:14 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:20:15 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:20:15 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:20:16 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:20:16 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:20:17 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:20:17 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:20:18 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:20:18 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:20:19 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:20:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:20:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:20:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:20:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:20:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:20:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:20:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:20:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:20:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:20:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:20:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:20:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2289 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:20:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2289 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:20:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2289 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:20:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2289 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:20:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2289 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:20:19 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2289 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:20:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:20:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:20:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:20:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:20:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:20:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:20:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:20:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:20:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:20:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:20:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:20:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:20:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:20:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:20:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:20:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:20:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:20:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:20:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:20:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:20:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:20:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:20:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:20:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:20:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:20:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:20:29 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:20:29 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:20:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:20:29 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:20:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:20:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:20:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:20:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:20:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:20:30 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:20:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:20:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:20:31 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:20:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:20:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:20:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:20:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:20:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:20:32 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:20:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:20:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:20:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:20:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:20:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:20:33 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:20:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:20:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:20:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:20:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:20:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:20:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:20:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:20:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:20:35 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:20:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:20:36 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:20:37 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:20:37 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:20:38 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:20:38 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:20:39 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:20:39 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:20:40 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:20:40 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:20:41 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:20:41 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:20:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:20:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:20:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:20:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:20:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:20:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:20:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:20:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:20:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:20:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:20:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:20:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:20:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:20:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:20:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:20:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:20:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:20:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:20:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:20:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:20:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:20:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:20:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:20:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:20:47 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:20:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:20:47 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:20:47 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:20:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:20:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:20:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:20:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:20:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:20:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:20:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:20:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:20:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:20:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:20:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:20:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:20:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:20:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:20:48 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:20:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:20:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:20:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:20:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:20:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:20:49 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:20:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:20:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:20:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:20:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:20:50 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:20:50 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:20:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:20:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:20:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:20:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:20:51 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:20:51 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:20:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:20:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:20:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:20:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:20:52 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:20:52 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:20:53 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:20:53 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:20:54 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:20:54 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:20:54 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:20:55 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:20:55 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:20:56 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:20:56 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:20:57 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:20:57 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:20:58 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:20:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:20:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:20:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:20:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:20:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:20:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:20:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:20:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:20:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:20:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:20:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:20:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2518 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:20:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:20:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:20:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2518 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:20:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2518 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:20:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2518 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:20:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2518 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:20:58 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=2518 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:21:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:21:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:21:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:21:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:21:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:21:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:21:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:21:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:21:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:21:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:21:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:21:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:21:04 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:21:04 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:21:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:21:04 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:21:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:21:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:21:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:21:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:21:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:21:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:21:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:21:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:21:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:21:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:21:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:21:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:21:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:21:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:21:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:21:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:21:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:21:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:21:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:21:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:21:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:21:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:21:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:21:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:21:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:21:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:21:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:21:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:21:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:21:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:21:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:21:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:21:09 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:21:09 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:21:10 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:21:10 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:21:11 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:21:11 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:21:12 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:21:12 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:21:12 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:21:13 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:21:13 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:21:14 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:21:14 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:21:15 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:21:15 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:21:16 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:21:16 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:21:17 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:21:17 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:21:18 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:21:18 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:21:19 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:21:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:21:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:21:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:21:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:21:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:21:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:21:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:21:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:21:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:21:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:21:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:21:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:21:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:21:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:21:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:21:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:21:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:21:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:21:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:21:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:21:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:21:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:21:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:21:24 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:21:24 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:21:24 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:21:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:21:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:21:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:21:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:21:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:21:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:21:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:21:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:21:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:21:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:21:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:21:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:21:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:21:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:21:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:21:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:21:30 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:21:30 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:21:30 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:21:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:21:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:21:30 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:30 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:21:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:21:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:21:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:21:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:21:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:21:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:21:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:21:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:21:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:21:31 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:21:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:21:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:21:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:21:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:21:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:21:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:21:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:32 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:21:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:21:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:21:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:21:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:21:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:21:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:21:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:21:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:21:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:21:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:21:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=480 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:21:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:21:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=480 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:21:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=480 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:21:32 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=480 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:21:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:21:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:21:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:21:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:21:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:21:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:21:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:21:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:21:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:21:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:21:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:21:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:21:37 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:21:37 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:21:37 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:21:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:21:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:21:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:21:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:21:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:21:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:21:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:21:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:21:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:21:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:21:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:21:39 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:21:39 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:21:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:21:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:21:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:21:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:21:40 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:21:40 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:21:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:21:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:21:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:21:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:21:41 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:21:41 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:21:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:21:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:21:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:21:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:21:42 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:21:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:21:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:21:42 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:21:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:21:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:21:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:21:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:21:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:21:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:21:42 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:21:42 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:21:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:43 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:21:43 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:21:44 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:21:44 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:21:45 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:21:45 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:21:45 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:21:46 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:21:46 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:21:47 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:21:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:21:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:47 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:21:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:21:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:21:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:21:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:21:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:21:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:21:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:21:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:21:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:21:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:47 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:21:48 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:21:48 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:21:49 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:21:49 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:21:50 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:21:50 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:21:51 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:21:51 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:21:52 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:21:52 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:21:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:21:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:21:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:21:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:21:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:21:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:21:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:21:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:21:52 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:21:52 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:21:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:53 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:21:53 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:21:53 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:21:54 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:21:54 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:21:55 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:21:55 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 10:21:56 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 10:21:56 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 10:21:57 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 10:21:57 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 10:21:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:21:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:21:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:21:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:21:57 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:21:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:21:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:21:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:21:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:21:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:21:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:21:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:21:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:21:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:21:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:21:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:21:57 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4529 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:21:57 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4529 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:21:57 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4529 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:21:57 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4529 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:21:57 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4529 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:21:57 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4529 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:21:57 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4529 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:21:57 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4529 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:22:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:22:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:22:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:22:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:22:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:22:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:22:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:22:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:22:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:22:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:22:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:22:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:22:03 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:22:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:22:03 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:22:03 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:22:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:22:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:22:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:22:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:22:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:22:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:22:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:22:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:22:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:22:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:22:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:22:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:22:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:22:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:22:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:22:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:22:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:22:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:22:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:22:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:22:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:22:05 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:22:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:22:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:22:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:22:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:22:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:22:06 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:22:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:22:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:22:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:22:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:22:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:22:07 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:22:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:22:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:22:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:22:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:22:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:22:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:22:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:22:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:22:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:22:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:22:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:22:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:22:08 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:08 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:22:09 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:22:09 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:22:09 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:22:10 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:22:10 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:22:11 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:22:11 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:22:12 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:22:12 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:22:13 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:22:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:22:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:13 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:22:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:22:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:22:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:22:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:22:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:22:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:22:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:22:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:22:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:22:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:13 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:22:14 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:22:14 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:22:15 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:22:15 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:22:16 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:22:16 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:22:16 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:22:17 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:22:17 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:22:18 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:22:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:22:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:22:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:22:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:22:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:22:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:22:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:22:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:22:18 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:22:18 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:22:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:18 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:22:19 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:22:19 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:22:20 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:22:20 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:22:21 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:22:21 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 10:22:22 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 10:22:22 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 10:22:23 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 10:22:23 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 10:22:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:22:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:23 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:22:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:22:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:22:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:22:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:22:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:22:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:22:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:22:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:22:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:22:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:22:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:22:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:22:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:22:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:22:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:22:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:22:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:22:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:22:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:22:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:22:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:22:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:22:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:22:29 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:22:29 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:22:29 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:22:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:22:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:22:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:22:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:22:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:22:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:22:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:22:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:22:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:22:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:22:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:22:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:22:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:22:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:22:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:22:30 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:22:30 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:22:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:22:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:22:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:22:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:22:31 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:22:31 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:22:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:22:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:22:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:22:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:22:32 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:22:32 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:22:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:22:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:22:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:22:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:22:32 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:22:33 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:22:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:22:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:22:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:22:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:22:33 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:22:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:22:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:22:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:22:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:22:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:22:34 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:22:34 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:34 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:22:34 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:22:35 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:22:35 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:22:36 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:22:36 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:22:37 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:22:37 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:22:38 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:22:38 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:22:39 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:22:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:22:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:39 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:22:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:22:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:22:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:22:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:22:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:22:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:22:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:22:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:22:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:22:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:39 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:22:39 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:22:40 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:22:40 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:22:41 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:22:41 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:22:42 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:22:42 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:22:43 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:22:43 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:22:44 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:22:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:22:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:22:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:22:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:22:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:22:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:22:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:22:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:22:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:22:44 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:22:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:44 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:22:45 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:22:45 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:22:46 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:22:46 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:22:47 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:22:47 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 10:22:47 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 10:22:48 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 10:22:48 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 10:22:49 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 10:22:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:22:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:49 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:22:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:22:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:22:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:22:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:22:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:22:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:22:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:22:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:22:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:22:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:22:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:22:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4519 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:22:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4519 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:22:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4519 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:22:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4519 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:22:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4519 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:22:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4519 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:22:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:22:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:22:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:22:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:22:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:22:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:22:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:22:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:22:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:22:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:22:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:22:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:22:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:22:55 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:22:55 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:22:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:22:55 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:22:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:22:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:22:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:22:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:22:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:22:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:22:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:22:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:22:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:22:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:22:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:22:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:22:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:22:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:22:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:22:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:22:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:22:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:22:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:22:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:22:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:22:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:22:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:22:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:22:57 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:22:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:22:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:22:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:22:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:22:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:22:58 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:22:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:22:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:22:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:22:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:22:58 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:22:59 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:22:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:22:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:22:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:22:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:22:59 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:23:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:23:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:23:00 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:23:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:23:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:23:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:23:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:23:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:23:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:23:00 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:23:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:00 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:23:01 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:23:01 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:23:02 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:23:02 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:23:03 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:23:03 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:23:03 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:23:04 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:23:04 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:23:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:23:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:05 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:23:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:23:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:23:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:23:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:23:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:23:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:23:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:23:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:23:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:23:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:05 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:23:05 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:23:06 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:23:06 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:23:07 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:23:07 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:23:08 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:23:08 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:23:09 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:23:09 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:23:10 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:23:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:23:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:23:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:23:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:23:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:23:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:23:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:23:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:23:10 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:23:10 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:23:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:10 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:23:10 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:23:11 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:23:11 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:23:12 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:23:12 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:23:13 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 10:23:13 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 10:23:14 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 10:23:14 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 10:23:15 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 10:23:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:23:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:15 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:23:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:23:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:23:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:23:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:23:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:23:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:23:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:23:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:23:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:23:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:23:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:23:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4530 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:23:15 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=4530 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:23:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:23:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:23:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:23:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:23:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:23:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:23:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:23:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:23:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:23:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:23:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:23:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:23:20 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:23:20 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:23:20 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:23:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:23:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:23:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:23:21 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:21 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:23:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:21 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:23:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:23:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:23:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:23:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:23:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:23:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:23:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:23:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:23:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:23:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:23:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:23:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:23:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:23:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:23:22 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:23:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:22 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:23:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:23:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:23 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:23:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:23:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:23:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:23:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:23:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:23:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:23:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:23:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:23:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:23:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:23:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:23:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:23:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:23:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:23:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:23:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:23:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:23:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:23:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:23:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:23:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:23:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:23:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:23:28 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:23:28 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:23:28 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:23:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:23:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:23:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:23:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:23:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:23:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:23:30 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:23:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:23:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:23:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:23:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:23:30 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:23:30 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:23:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:23:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:23:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:23:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:23:31 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:23:31 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:23:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:23:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:23:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:23:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:23:32 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:23:32 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:23:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:23:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:23:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:23:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:23:33 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:23:33 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:23:34 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:23:34 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:23:35 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:23:35 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:23:36 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:23:36 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:23:37 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:23:37 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:23:38 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:23:38 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:23:38 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:23:39 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:23:39 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:23:40 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:23:40 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:23:41 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:23:41 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:23:42 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:23:42 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:23:43 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:23:43 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:23:44 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:23:44 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:23:45 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:23:45 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:23:45 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:23:46 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:23:46 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 10:23:47 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 10:23:47 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 10:23:48 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 10:23:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:23:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:23:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:23:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:23:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:23:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:23:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:23:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:23:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:23:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:23:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:23:48 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:23:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:23:48 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 10:23:49 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 10:23:49 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 10:23:50 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 10:23:50 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 10:23:51 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 10:23:51 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 10:23:52 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 10:23:52 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 10:23:53 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 10:23:53 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 10:23:53 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 10:23:54 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 10:23:54 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 10:23:55 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 10:23:55 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 10:23:56 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 10:23:56 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 10:23:57 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 10:23:57 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 10:23:58 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 10:23:58 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 10:23:59 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 10:23:59 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 10:24:00 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 10:24:00 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 10:24:00 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 10:24:01 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 10:24:01 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 10:24:02 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 10:24:02 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 10:24:03 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 10:24:03 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 10:24:04 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 10:24:04 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-24 10:24:05 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-24 10:24:05 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-24 10:24:06 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-24 10:24:06 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-24 10:24:07 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-24 10:24:07 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-24 10:24:08 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-24 10:24:08 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-24 10:24:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:24:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:24:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:24:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:24:08 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:24:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:24:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:24:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:24:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:24:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:24:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:24:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:24:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:24:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:24:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:24:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:24:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:24:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:24:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:24:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:24:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:24:08 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-24 10:24:09 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-24 10:24:09 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-24 10:24:10 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-24 10:24:10 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-24 10:24:11 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-24 10:24:11 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-24 10:24:12 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-24 10:24:12 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-24 10:24:13 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-24 10:24:13 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-24 10:24:14 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-24 10:24:14 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-24 10:24:15 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-24 10:24:15 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-24 10:24:15 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-24 10:24:16 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-24 10:24:16 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-24 10:24:17 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-24 10:24:17 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-24 10:24:18 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-24 10:24:18 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-24 10:24:19 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-24 10:24:19 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-24 10:24:20 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-24 10:24:20 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-24 10:24:21 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-24 10:24:21 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-24 10:24:22 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-24 10:24:22 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-24 10:24:23 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-24 10:24:23 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-24 10:24:23 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-24 10:24:24 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-24 10:24:24 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-24 10:24:25 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-24 10:24:25 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-24 10:24:26 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-24 10:24:26 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-24 10:24:27 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-24 10:24:27 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-24 10:24:28 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-24 10:24:28 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-24 10:24:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:24:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:24:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:24:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:24:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:24:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:24:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:24:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:24:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:24:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:24:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:24:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:24:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:24:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:24:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:24:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:24:28 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:24:28 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:24:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:24:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:24:29 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-24 10:24:29 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-24 10:24:30 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-24 10:24:30 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-24 10:24:30 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-24 10:24:31 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-24 10:24:31 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-24 10:24:32 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-24 10:24:32 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-24 10:24:33 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-24 10:24:33 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-24 10:24:34 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-24 10:24:34 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-24 10:24:35 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-24 10:24:35 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-24 10:24:36 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-24 10:24:36 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-24 10:24:37 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-24 10:24:37 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-24 10:24:38 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-24 10:24:38 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-24 10:24:38 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-24 10:24:39 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-24 10:24:39 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-24 10:24:40 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-24 10:24:40 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-24 10:24:41 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-24 10:24:41 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-24 10:24:42 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-24 10:24:42 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-24 10:24:43 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-24 10:24:43 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-24 10:24:44 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-24 10:24:44 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-24 10:24:45 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-24 10:24:45 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-24 10:24:46 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-24 10:24:46 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-24 10:24:46 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-24 10:24:47 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-24 10:24:47 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-24 10:24:48 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-24 10:24:48 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-24 10:24:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:24:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:24:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:24:48 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:24:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:24:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:24:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:24:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:24:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:24:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:24:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:24:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:24:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=17573 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:24:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=17573 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:24:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=17573 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:24:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:24:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:24:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:24:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:24:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:24:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:24:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:24:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:24:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:24:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:24:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:24:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:24:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:24:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:24:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:24:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:24:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:24:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:24:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:24:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:24:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:24:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:24:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:24:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:24:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:24:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:24:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:24:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:24:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:24:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:24:59 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:24:59 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:24:59 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:24:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:24:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:24:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:24:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:24:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:24:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:24:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:25:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:25:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:25:00 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:00 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:25:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:25:00 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:00 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:25:00 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:25:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:25:00 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:01 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:25:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:25:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:25:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:25:01 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:25:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:02 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:25:02 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:25:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:03 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:25:03 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:25:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:25:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:25:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:04 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:25:04 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:25:05 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:25:05 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:25:06 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:25:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:25:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:25:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:06 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:25:06 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:25:07 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:25:07 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:25:08 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:25:08 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:25:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:25:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:25:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:25:09 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:25:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:09 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:25:09 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:25:10 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:25:10 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:25:11 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:25:11 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:25:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:11 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:25:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:25:11 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:25:11 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:25:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:12 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:25:12 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:25:13 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:25:13 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:25:14 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:25:14 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:25:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:14 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:25:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:25:14 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:25:14 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:25:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:14 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:25:15 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:25:15 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:25:16 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:25:16 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:25:17 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:25:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:17 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:25:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:25:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:25:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:25:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:25:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:25:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:25:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:25:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:25:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:25:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:25:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:25:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:25:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:25:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:25:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:25:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:25:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:25:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:25:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:25:22 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:25:22 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:22 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:25:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:25:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:25:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:25:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:25:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:25:25 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:25:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:25:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:25:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:25:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:25:26 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:25:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:26 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:25:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:26 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:25:27 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:25:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:27 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:25:28 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:25:28 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:25:29 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:25:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:29 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:25:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:25:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:25:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:29 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:25:29 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:25:30 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:25:30 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:25:31 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:25:31 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:25:32 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:25:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:25:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:25:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:25:32 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:25:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:32 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:25:33 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:25:33 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:25:34 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:25:34 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:25:35 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:25:35 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:25:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:35 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:25:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:25:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:25:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:25:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:25:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:25:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:25:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:25:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:25:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:25:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:25:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:25:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:25:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:25:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:25:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:25:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:25:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:25:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:25:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:25:41 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:41 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:25:41 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:25:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:25:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:25:41 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:25:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:42 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:25:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:25:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:25:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:25:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:43 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:25:43 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:25:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:44 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:25:44 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:25:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:45 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:25:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:25:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:25:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:25:45 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:25:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:45 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:25:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:46 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:25:46 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:25:47 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:25:47 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:25:48 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:25:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:48 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:25:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:25:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:25:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:25:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:25:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:25:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:25:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:25:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1603 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:25:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1603 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:25:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1603 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:25:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1603 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:25:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1603 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:25:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1603 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:25:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1603 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:25:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:25:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:25:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:25:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:25:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:25:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:25:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:25:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:25:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:25:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:25:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:25:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:25:53 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:25:53 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:53 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:25:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:25:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:25:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:25:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:25:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:25:55 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:25:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:25:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:25:56 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:25:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:56 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:25:57 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:25:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:57 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:25:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:25:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:25:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:25:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:25:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:25:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:25:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:25:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:25:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:25:57 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:25:58 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:25:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:25:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:25:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:25:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:25:58 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:25:59 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:25:59 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:25:59 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:26:00 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:26:00 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:26:01 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:26:01 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:26:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:26:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:26:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:26:02 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:26:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:26:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:26:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:26:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:26:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:26:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:26:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:26:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:26:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:26:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:26:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:26:02 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:26:02 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:26:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:02 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:26:03 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:26:03 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:26:04 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:26:04 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:26:05 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:26:05 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:26:06 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:26:06 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:26:06 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:26:07 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:26:07 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:26:08 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:26:08 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:26:09 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:26:09 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:26:10 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:26:10 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:26:11 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:26:11 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:26:12 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 10:26:12 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 10:26:13 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 10:26:13 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 10:26:14 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 10:26:14 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 10:26:14 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 10:26:15 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 10:26:15 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 10:26:16 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 10:26:16 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 10:26:17 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 10:26:17 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 10:26:18 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 10:26:18 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 10:26:19 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 10:26:19 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 10:26:20 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 10:26:20 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 10:26:21 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 10:26:21 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 10:26:21 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 10:26:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:26:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:26:22 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:26:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:26:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:26:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:26:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:26:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:26:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:26:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:26:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:26:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:26:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:26:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6295 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:26:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:26:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6296 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:26:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6296 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:26:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6296 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:26:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6296 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:26:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6296 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:26:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6296 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:26:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6296 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:26:22 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6296 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:26:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:26:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:26:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:26:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:26:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:26:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:26:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:26:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:26:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:26:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:26:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:26:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:26:27 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:26:27 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:26:27 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:26:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:26:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:26:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:26:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:26:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:26:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:26:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:26:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:26:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:26:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:26:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:26:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:26:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:26:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:26:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:26:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:26:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:26:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:26:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:26:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:26:28 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:26:28 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:26:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:26:29 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:26:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:26:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:26:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:26:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:26:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:26:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:26:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:26:29 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:26:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:26:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:26:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:26:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:26:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:26:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:26:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:26:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:26:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:26:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:26:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:26:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:26:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:29 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:26:30 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:26:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:26:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:26:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:26:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:26:30 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:26:31 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:26:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:26:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:26:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:26:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:26:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:26:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:26:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:26:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:26:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:26:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:26:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:26:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:26:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:26:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:26:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:26:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:26:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:26:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:26:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:26:31 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:26:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:31 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:26:32 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:26:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:26:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:26:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:26:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:26:32 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:26:32 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:26:33 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:26:33 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:26:34 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:26:34 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:26:35 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:26:35 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:26:36 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:26:36 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:26:37 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:26:37 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:26:38 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:26:38 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:26:39 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:26:39 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:26:40 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:26:40 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:26:40 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:26:41 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:26:41 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:26:42 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:26:42 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:26:43 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:26:43 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:26:44 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:26:44 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:26:45 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:26:45 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:26:46 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 10:26:46 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 10:26:47 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 10:26:47 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 10:26:48 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 10:26:48 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 10:26:48 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 10:26:49 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 10:26:49 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 10:26:50 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 10:26:50 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 10:26:51 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 10:26:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:26:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:26:51 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:26:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:26:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:26:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:26:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:26:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:26:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:26:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:26:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:26:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5258 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:26:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5258 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:26:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5259 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:26:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5259 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:26:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5259 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:26:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5259 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:26:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5259 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:26:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5259 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:26:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5259 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:26:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5259 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:26:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:26:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:26:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:26:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:26:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:26:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:26:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:26:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:26:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:26:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:26:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:26:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:26:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:26:57 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:26:57 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:26:57 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:26:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:26:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:26:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:26:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:26:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:26:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:26:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:26:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:26:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:26:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:26:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:26:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:26:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:26:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:26:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:26:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:26:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:26:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:26:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:26:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:26:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:26:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:26:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:26:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:26:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:26:58 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:26:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:26:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:26:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:26:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:26:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:26:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:26:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:26:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:26:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:26:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:26:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:26:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:26:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:26:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:26:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:26:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:26:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:26:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:26:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:26:59 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:26:59 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:26:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:26:59 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:27:00 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:27:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:27:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:27:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:27:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:27:00 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:27:01 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:27:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:27:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:27:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:27:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:27:01 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:27:02 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:27:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:27:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:27:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:27:02 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:27:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:27:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:27:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:27:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:27:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:27:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:27:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:27:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:27:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:27:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:27:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:27:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:27:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:27:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:02 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:27:03 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:27:03 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:27:04 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:27:04 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:27:05 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:27:05 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:27:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:27:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:27:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:27:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:27:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:27:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:27:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:27:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:27:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:27:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:27:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:27:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:27:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:27:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:27:05 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:27:05 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:27:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:05 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:27:06 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:27:06 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:27:07 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:27:07 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:27:08 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:27:08 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:27:09 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:27:09 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:27:10 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:27:10 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:27:11 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:27:11 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:27:12 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:27:12 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:27:13 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:27:13 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:27:13 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:27:14 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:27:14 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:27:15 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 10:27:15 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 10:27:16 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 10:27:16 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 10:27:17 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 10:27:17 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 10:27:18 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 10:27:18 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 10:27:19 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 10:27:19 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 10:27:20 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 10:27:20 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 10:27:20 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 10:27:21 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 10:27:21 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 10:27:22 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 10:27:22 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 10:27:23 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 10:27:23 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 10:27:24 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 10:27:24 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 10:27:25 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 10:27:25 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 10:27:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:27:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:27:25 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:27:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:27:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:27:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:27:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:27:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:27:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:27:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:27:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:27:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6331 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:27:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:27:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:27:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:27:25 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=6331 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:27:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:27:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:27:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:27:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:27:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:27:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:27:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:27:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:27:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:27:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:27:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:27:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:27:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:27:31 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:27:31 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:27:31 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:27:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:27:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:27:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:27:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:27:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:27:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:27:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:27:31 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:27:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:27:31 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:27:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:27:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:27:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:27:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:27:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:27:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:27:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:27:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:27:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:27:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:27:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:27:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:27:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:27:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:27:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:27:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:27:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:27:32 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:27:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:27:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:27:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:27:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:27:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:27:33 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:27:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:27:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:27:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:27:33 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:27:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:27:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:27:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:27:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:27:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:27:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:27:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:27:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:27:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:27:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:27:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:27:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:27:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:27:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:27:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:27:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:27:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:27:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:27:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:27:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:27:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:27:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:27:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:27:38 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:27:38 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:27:38 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:27:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:27:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:27:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:27:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:27:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:27:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:27:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:27:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:27:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:27:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:27:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:27:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:27:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:27:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:27:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:27:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:27:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:27:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:27:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:27:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:27:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:27:41 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:27:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:27:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:27:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:27:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:27:42 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:27:42 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:27:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:27:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:27:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:27:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:27:43 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:27:43 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:27:44 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:27:44 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:27:45 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:27:45 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:27:46 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:27:46 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:27:47 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:27:47 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:27:48 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:27:48 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:27:49 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:27:49 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:27:49 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:27:50 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:27:50 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:27:51 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:27:51 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:27:52 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:27:52 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:27:53 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:27:53 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:27:54 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:27:54 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:27:55 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:27:55 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:27:56 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:27:56 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:27:57 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 10:27:57 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 10:27:57 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 10:27:58 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 10:27:58 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 10:27:59 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 10:27:59 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 10:28:00 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 10:28:00 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 10:28:01 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 10:28:01 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 10:28:02 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 10:28:02 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 10:28:03 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 10:28:03 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 10:28:04 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 10:28:04 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 10:28:04 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 10:28:05 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 10:28:05 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 10:28:06 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 10:28:06 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 10:28:07 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 10:28:07 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 10:28:08 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 10:28:08 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 10:28:09 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 10:28:09 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 10:28:10 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 10:28:10 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 10:28:11 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 10:28:11 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 10:28:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:28:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:28:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:28:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:28:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:28:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:28:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:28:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:28:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:28:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:28:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:28:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:28:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:28:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:28:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:28:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:28:11 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:28:11 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:28:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:28:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:28:12 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 10:28:12 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 10:28:12 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 10:28:13 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 10:28:13 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 10:28:14 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 10:28:14 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-24 10:28:15 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-24 10:28:15 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-24 10:28:16 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-24 10:28:16 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-24 10:28:17 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-24 10:28:17 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-24 10:28:18 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-24 10:28:18 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-24 10:28:19 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-24 10:28:19 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-24 10:28:19 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-24 10:28:20 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-24 10:28:20 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-24 10:28:21 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-24 10:28:21 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-24 10:28:22 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-24 10:28:22 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-24 10:28:23 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-24 10:28:23 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-24 10:28:24 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-24 10:28:24 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-24 10:28:25 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-24 10:28:25 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-24 10:28:26 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-24 10:28:26 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-24 10:28:27 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-24 10:28:27 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-24 10:28:27 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-24 10:28:28 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-24 10:28:28 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-24 10:28:29 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-24 10:28:29 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-24 10:28:30 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-24 10:28:30 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-24 10:28:31 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-24 10:28:31 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-24 10:28:32 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-24 10:28:32 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-24 10:28:33 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-24 10:28:33 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-24 10:28:34 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-24 10:28:34 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-24 10:28:35 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-24 10:28:35 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-24 10:28:35 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-24 10:28:36 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-24 10:28:36 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-24 10:28:37 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-24 10:28:37 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-24 10:28:38 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-24 10:28:38 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-24 10:28:39 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-24 10:28:39 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-24 10:28:40 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-24 10:28:40 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-24 10:28:41 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-24 10:28:41 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-24 10:28:42 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-24 10:28:42 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-24 10:28:42 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-24 10:28:43 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-24 10:28:43 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-24 10:28:44 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-24 10:28:44 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-24 10:28:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:28:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:28:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:28:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:28:45 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:28:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:28:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:28:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:28:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:28:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:28:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:28:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:28:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:28:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:28:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:28:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:28:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:28:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:28:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:28:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:28:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:28:45 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-24 10:28:45 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-24 10:28:46 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-24 10:28:46 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-24 10:28:47 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-24 10:28:47 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-24 10:28:48 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-24 10:28:48 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-24 10:28:49 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-24 10:28:49 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-24 10:28:49 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-24 10:28:50 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-24 10:28:50 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-24 10:28:51 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-24 10:28:51 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-24 10:28:52 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-24 10:28:52 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-24 10:28:53 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-24 10:28:53 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-24 10:28:54 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-24 10:28:54 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-24 10:28:55 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-24 10:28:55 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-24 10:28:56 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-24 10:28:56 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-24 10:28:57 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-24 10:28:57 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-24 10:28:57 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-24 10:28:58 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-24 10:28:58 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-24 10:28:59 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-24 10:28:59 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-24 10:29:00 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-24 10:29:00 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-24 10:29:01 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-24 10:29:01 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-24 10:29:02 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-24 10:29:02 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-24 10:29:03 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-24 10:29:03 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-24 10:29:04 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-24 10:29:04 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-24 10:29:05 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-24 10:29:05 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-24 10:29:05 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-24 10:29:06 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2024-10-24 10:29:06 [DEBUG] clck_gen.py:102 IND CLOCK 19278
2024-10-24 10:29:07 [DEBUG] clck_gen.py:102 IND CLOCK 19380
2024-10-24 10:29:07 [DEBUG] clck_gen.py:102 IND CLOCK 19482
2024-10-24 10:29:08 [DEBUG] clck_gen.py:102 IND CLOCK 19584
2024-10-24 10:29:08 [DEBUG] clck_gen.py:102 IND CLOCK 19686
2024-10-24 10:29:09 [DEBUG] clck_gen.py:102 IND CLOCK 19788
2024-10-24 10:29:09 [DEBUG] clck_gen.py:102 IND CLOCK 19890
2024-10-24 10:29:10 [DEBUG] clck_gen.py:102 IND CLOCK 19992
2024-10-24 10:29:10 [DEBUG] clck_gen.py:102 IND CLOCK 20094
2024-10-24 10:29:11 [DEBUG] clck_gen.py:102 IND CLOCK 20196
2024-10-24 10:29:11 [DEBUG] clck_gen.py:102 IND CLOCK 20298
2024-10-24 10:29:12 [DEBUG] clck_gen.py:102 IND CLOCK 20400
2024-10-24 10:29:12 [DEBUG] clck_gen.py:102 IND CLOCK 20502
2024-10-24 10:29:12 [DEBUG] clck_gen.py:102 IND CLOCK 20604
2024-10-24 10:29:13 [DEBUG] clck_gen.py:102 IND CLOCK 20706
2024-10-24 10:29:13 [DEBUG] clck_gen.py:102 IND CLOCK 20808
2024-10-24 10:29:14 [DEBUG] clck_gen.py:102 IND CLOCK 20910
2024-10-24 10:29:14 [DEBUG] clck_gen.py:102 IND CLOCK 21012
2024-10-24 10:29:15 [DEBUG] clck_gen.py:102 IND CLOCK 21114
2024-10-24 10:29:15 [DEBUG] clck_gen.py:102 IND CLOCK 21216
2024-10-24 10:29:16 [DEBUG] clck_gen.py:102 IND CLOCK 21318
2024-10-24 10:29:16 [DEBUG] clck_gen.py:102 IND CLOCK 21420
2024-10-24 10:29:17 [DEBUG] clck_gen.py:102 IND CLOCK 21522
2024-10-24 10:29:17 [DEBUG] clck_gen.py:102 IND CLOCK 21624
2024-10-24 10:29:18 [DEBUG] clck_gen.py:102 IND CLOCK 21726
2024-10-24 10:29:18 [DEBUG] clck_gen.py:102 IND CLOCK 21828
2024-10-24 10:29:19 [DEBUG] clck_gen.py:102 IND CLOCK 21930
2024-10-24 10:29:19 [DEBUG] clck_gen.py:102 IND CLOCK 22032
2024-10-24 10:29:20 [DEBUG] clck_gen.py:102 IND CLOCK 22134
2024-10-24 10:29:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:29:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:29:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:29:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:29:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:29:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:29:20 [DEBUG] clck_gen.py:102 IND CLOCK 22236
2024-10-24 10:29:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:29:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:29:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:29:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:29:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:29:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:29:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:29:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:29:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:29:20 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:29:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:29:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:29:20 [DEBUG] clck_gen.py:102 IND CLOCK 22338
2024-10-24 10:29:21 [DEBUG] clck_gen.py:102 IND CLOCK 22440
2024-10-24 10:29:21 [DEBUG] clck_gen.py:102 IND CLOCK 22542
2024-10-24 10:29:22 [DEBUG] clck_gen.py:102 IND CLOCK 22644
2024-10-24 10:29:22 [DEBUG] clck_gen.py:102 IND CLOCK 22746
2024-10-24 10:29:23 [DEBUG] clck_gen.py:102 IND CLOCK 22848
2024-10-24 10:29:23 [DEBUG] clck_gen.py:102 IND CLOCK 22950
2024-10-24 10:29:24 [DEBUG] clck_gen.py:102 IND CLOCK 23052
2024-10-24 10:29:24 [DEBUG] clck_gen.py:102 IND CLOCK 23154
2024-10-24 10:29:25 [DEBUG] clck_gen.py:102 IND CLOCK 23256
2024-10-24 10:29:25 [DEBUG] clck_gen.py:102 IND CLOCK 23358
2024-10-24 10:29:26 [DEBUG] clck_gen.py:102 IND CLOCK 23460
2024-10-24 10:29:26 [DEBUG] clck_gen.py:102 IND CLOCK 23562
2024-10-24 10:29:27 [DEBUG] clck_gen.py:102 IND CLOCK 23664
2024-10-24 10:29:27 [DEBUG] clck_gen.py:102 IND CLOCK 23766
2024-10-24 10:29:27 [DEBUG] clck_gen.py:102 IND CLOCK 23868
2024-10-24 10:29:28 [DEBUG] clck_gen.py:102 IND CLOCK 23970
2024-10-24 10:29:28 [DEBUG] clck_gen.py:102 IND CLOCK 24072
2024-10-24 10:29:29 [DEBUG] clck_gen.py:102 IND CLOCK 24174
2024-10-24 10:29:29 [DEBUG] clck_gen.py:102 IND CLOCK 24276
2024-10-24 10:29:30 [DEBUG] clck_gen.py:102 IND CLOCK 24378
2024-10-24 10:29:30 [DEBUG] clck_gen.py:102 IND CLOCK 24480
2024-10-24 10:29:31 [DEBUG] clck_gen.py:102 IND CLOCK 24582
2024-10-24 10:29:31 [DEBUG] clck_gen.py:102 IND CLOCK 24684
2024-10-24 10:29:32 [DEBUG] clck_gen.py:102 IND CLOCK 24786
2024-10-24 10:29:32 [DEBUG] clck_gen.py:102 IND CLOCK 24888
2024-10-24 10:29:33 [DEBUG] clck_gen.py:102 IND CLOCK 24990
2024-10-24 10:29:33 [DEBUG] clck_gen.py:102 IND CLOCK 25092
2024-10-24 10:29:34 [DEBUG] clck_gen.py:102 IND CLOCK 25194
2024-10-24 10:29:34 [DEBUG] clck_gen.py:102 IND CLOCK 25296
2024-10-24 10:29:35 [DEBUG] clck_gen.py:102 IND CLOCK 25398
2024-10-24 10:29:35 [DEBUG] clck_gen.py:102 IND CLOCK 25500
2024-10-24 10:29:35 [DEBUG] clck_gen.py:102 IND CLOCK 25602
2024-10-24 10:29:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:29:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:29:36 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:29:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:29:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:29:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:29:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:29:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:29:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:29:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:29:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:29:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:29:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:29:36 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=25678 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:29:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:29:36 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=25678 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:29:36 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=25678 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:29:36 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=25678 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:29:36 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=25678 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:29:36 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=25678 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:29:36 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=25678 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:29:36 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=25678 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:29:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:29:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:29:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:29:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:29:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:29:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:29:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:29:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:29:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:29:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:29:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:29:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:29:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:29:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:29:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:29:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:29:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:29:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:29:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:29:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:29:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:29:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:29:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:29:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:29:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:29:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:29:46 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:29:46 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:29:46 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:29:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:29:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:29:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:29:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:29:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:29:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:29:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:29:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:29:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:29:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:29:48 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:29:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:29:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:29:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:29:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:29:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:29:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:29:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:29:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:29:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:29:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:29:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:29:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:29:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:29:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:29:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:29:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:29:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:29:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:29:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:29:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:29:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:29:48 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:29:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:29:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:29:48 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:29:49 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:29:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:29:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:29:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:29:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:29:49 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:29:50 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:29:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:29:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:29:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:29:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:29:50 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:29:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:29:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:29:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:29:50 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:29:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:29:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:29:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:29:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:29:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:29:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:29:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:29:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:29:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:29:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:29:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:29:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:29:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:29:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:29:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:29:51 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:29:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:29:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:29:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:29:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:29:51 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:29:51 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:29:52 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:29:52 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:29:53 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:29:53 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:29:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:29:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:29:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:29:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:29:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:29:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:29:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:29:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:29:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:29:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:29:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:29:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:29:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:29:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:29:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:29:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:29:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:29:54 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:29:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:29:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:29:54 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:29:54 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:29:55 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:29:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:29:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:29:55 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:29:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:29:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:29:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:29:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:29:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:29:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:29:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:29:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:29:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:29:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:29:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1959 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:29:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:29:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1959 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:29:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1959 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:30:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:30:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:30:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:30:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:30:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:30:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:30:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:30:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:30:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:30:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:30:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:30:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:30:00 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:30:00 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:30:00 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:30:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:30:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:30:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:30:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:30:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:30:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:30:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:30:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:30:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:30:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:30:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:30:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:30:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:30:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:30:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:30:02 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:30:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:30:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:30:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:30:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:30:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:30:03 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:30:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:30:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:30:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:30:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:30:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:30:04 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:30:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:30:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:30:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:30:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:30:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:30:05 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:30:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:30:06 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:30:06 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:30:07 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:30:07 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:30:08 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:30:08 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:30:09 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:30:09 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:30:10 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:30:10 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:30:11 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:30:11 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:30:12 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:30:12 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:30:13 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:30:13 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:30:14 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:30:14 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:30:14 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:30:15 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:30:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:30:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:30:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:30:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:30:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:30:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:30:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:30:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:30:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:30:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:30:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:30:15 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:30:15 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:30:16 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:30:16 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:30:17 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:30:17 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:30:18 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:30:18 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:30:19 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 10:30:19 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 10:30:20 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 10:30:20 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 10:30:21 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 10:30:21 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 10:30:22 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 10:30:22 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 10:30:22 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 10:30:23 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 10:30:23 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 10:30:24 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 10:30:24 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 10:30:25 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 10:30:25 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 10:30:26 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 10:30:26 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 10:30:27 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 10:30:27 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 10:30:28 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 10:30:28 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 10:30:29 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 10:30:29 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 10:30:29 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 10:30:30 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 10:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:30:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:30:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:30:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:30:30 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:30:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:30:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:30:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:30:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:30:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:30:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:30:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:30:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:30:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:30:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:30:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:30:30 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 10:30:31 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 10:30:31 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 10:30:32 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 10:30:32 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 10:30:33 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 10:30:33 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 10:30:34 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 10:30:34 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 10:30:35 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 10:30:35 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 10:30:36 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 10:30:36 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 10:30:37 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-24 10:30:37 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-24 10:30:37 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-24 10:30:38 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-24 10:30:38 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-24 10:30:39 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-24 10:30:39 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-24 10:30:40 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-24 10:30:40 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-24 10:30:41 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-24 10:30:41 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-24 10:30:42 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-24 10:30:42 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-24 10:30:43 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-24 10:30:43 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-24 10:30:44 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-24 10:30:44 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-24 10:30:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:30:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:30:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:30:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:30:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:30:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:30:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:30:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:30:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:30:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:30:44 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-24 10:30:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:30:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:30:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:30:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:30:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:30:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:30:45 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:30:45 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-24 10:30:45 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-24 10:30:46 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-24 10:30:46 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-24 10:30:47 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-24 10:30:47 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-24 10:30:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:30:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:30:48 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:30:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:30:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:30:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:30:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:30:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:30:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:30:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:30:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=10389 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:30:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:30:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=10389 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:30:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=10389 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:30:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=10389 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:30:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=10389 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:30:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=10389 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:30:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=10390 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:30:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=10390 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:30:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=10390 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:30:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=10390 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:30:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=10390 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:30:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=10390 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:30:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=10390 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:30:48 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=10390 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:30:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:30:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:30:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:30:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:30:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:30:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:30:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:30:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:30:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:30:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:30:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:30:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:30:53 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:30:53 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:30:53 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:30:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:30:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:30:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:30:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:30:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:30:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:30:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:30:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:30:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:30:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:30:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:30:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:30:56 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:30:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:30:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:30:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:30:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:30:56 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:30:56 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:30:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:30:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:30:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:30:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:30:57 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:30:57 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:30:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:30:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:30:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:30:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:30:58 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:30:58 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:30:59 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:30:59 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:31:00 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:31:00 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:31:01 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:31:01 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:31:02 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:31:02 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:31:03 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:31:03 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:31:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:31:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:31:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:31:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:31:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:31:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:31:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:31:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:31:03 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:31:03 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:31:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:04 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:31:04 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:31:04 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:31:05 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:31:05 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:31:06 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:31:06 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:31:07 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:31:07 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:31:08 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:31:08 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:31:09 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:31:09 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:31:10 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:31:10 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:31:11 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:31:11 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:31:12 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 10:31:12 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 10:31:12 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 10:31:13 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 10:31:13 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 10:31:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:31:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:14 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:31:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:31:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:31:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:31:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:31:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:31:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:31:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:31:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:31:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:31:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:14 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 10:31:14 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 10:31:15 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 10:31:15 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 10:31:16 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 10:31:16 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 10:31:17 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 10:31:17 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 10:31:18 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 10:31:18 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 10:31:19 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 10:31:19 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 10:31:19 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 10:31:20 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 10:31:20 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 10:31:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:31:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:31:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:31:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:31:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:31:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:31:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:31:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:31:21 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:31:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:21 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 10:31:21 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 10:31:22 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 10:31:22 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-24 10:31:23 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-24 10:31:23 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-24 10:31:24 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-24 10:31:24 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-24 10:31:25 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-24 10:31:25 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-24 10:31:26 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-24 10:31:26 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-24 10:31:27 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-24 10:31:27 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-24 10:31:27 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-24 10:31:28 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-24 10:31:28 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-24 10:31:29 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-24 10:31:29 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-24 10:31:30 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-24 10:31:30 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-24 10:31:31 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-24 10:31:31 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-24 10:31:32 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-24 10:31:32 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-24 10:31:33 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-24 10:31:33 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-24 10:31:34 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-24 10:31:34 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-24 10:31:34 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-24 10:31:35 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-24 10:31:35 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-24 10:31:36 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-24 10:31:36 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-24 10:31:37 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-24 10:31:37 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-24 10:31:38 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-24 10:31:38 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-24 10:31:39 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-24 10:31:39 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-24 10:31:40 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-24 10:31:40 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-24 10:31:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:40 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:31:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:31:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:31:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:31:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:31:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:31:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:31:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:31:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:31:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:31:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:31:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:31:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:31:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:31:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:31:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:31:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:31:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:31:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:31:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:31:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:31:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:31:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:31:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:31:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:31:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:31:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:31:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:31:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:31:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:31:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:31:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:31:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:31:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:31:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:31:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:31:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:31:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:31:46 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:31:46 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:31:46 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:31:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:31:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:31:46 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:31:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:31:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:31:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:31:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:31:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:31:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:31:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:47 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:31:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:31:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:31:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:31:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:31:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:31:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:31:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:31:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:31:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:31:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:47 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:31:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:31:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:31:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:31:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:31:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:31:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:31:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:31:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:31:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:31:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:31:48 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:48 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:31:48 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:31:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:31:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:31:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:31:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:31:49 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:31:49 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:31:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:31:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:31:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:31:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:31:50 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:31:50 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:31:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:31:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:31:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:31:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:31:51 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:31:51 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:31:52 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:31:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:31:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:52 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:31:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:31:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:31:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:31:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:31:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:31:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:31:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:31:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:31:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:31:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:31:52 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=1389 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:31:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:31:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:31:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:31:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:31:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:31:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:31:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:31:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:31:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:31:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:31:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:31:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:31:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:31:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:31:57 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:31:57 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:31:57 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:31:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:31:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:31:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:31:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:31:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:31:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:31:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:31:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:31:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:31:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:31:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:31:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:31:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:31:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:31:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:31:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:31:59 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:31:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:31:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:31:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:31:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:31:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:32:00 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:32:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:32:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:32:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:32:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:32:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:32:01 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:32:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:32:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:32:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:32:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:32:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:32:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:32:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:32:01 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:32:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:32:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:32:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:32:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:32:01 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:32:02 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:32:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:32:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:32:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:32:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:32:02 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:32:03 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:32:03 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:32:04 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:32:04 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:04 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:32:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:32:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:32:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:32:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:32:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:32:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:32:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:04 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:32:05 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:32:05 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:32:06 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:32:06 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:32:07 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:32:07 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:32:08 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:32:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:32:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:32:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:32:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:32:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:32:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:32:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:32:08 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:32:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:08 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:32:09 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:32:09 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:32:10 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:32:10 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:32:11 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:32:11 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:32:11 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:32:12 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:32:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:12 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:32:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:32:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:32:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:32:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:32:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:32:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:32:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:32:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:32:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:32:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:32:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:32:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:32:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:32:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:32:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:32:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:32:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:32:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:32:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:32:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:32:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:32:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:32:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:32:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:32:18 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:32:18 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:18 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:32:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:32:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:32:18 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:32:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:32:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:32:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:19 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:32:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:32:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:32:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:32:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:32:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:32:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:32:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:32:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:19 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:32:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:32:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:32:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:32:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:32:19 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:32:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:32:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:32:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:32:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:32:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:32:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:32:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:32:20 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:32:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:20 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:32:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:32:20 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:32:21 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:32:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:32:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:32:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:32:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:32:21 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:32:22 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:32:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:32:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:32:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:32:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:32:22 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:32:23 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:32:23 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:32:24 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:32:24 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:32:25 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:32:25 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:32:26 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:32:26 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:32:26 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:32:27 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:32:27 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:32:28 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:32:28 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:32:29 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:32:29 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:32:30 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:32:30 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:32:31 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:32:31 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:32:32 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:32:32 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:32:33 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:32:33 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:32:34 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:32:34 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:32:34 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:32:35 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:32:35 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:32:36 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 10:32:36 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 10:32:37 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 10:32:37 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 10:32:38 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 10:32:38 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 10:32:39 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 10:32:39 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 10:32:40 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 10:32:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:40 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:32:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:32:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:32:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:32:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:32:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:32:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:32:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:32:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:32:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:32:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:32:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:32:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:32:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:32:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:32:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:32:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:32:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:32:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:32:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:32:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:32:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:32:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:32:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:32:45 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:32:45 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:45 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:32:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:32:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:32:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:32:47 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:32:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:32:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:32:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:32:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:32:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:32:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:32:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:32:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:32:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:32:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:32:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:32:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:32:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:32:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:32:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:32:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:32:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:32:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:32:48 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:32:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:32:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:32:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:32:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:32:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:32:49 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:32:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:32:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:32:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:32:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:32:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:32:50 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:32:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:32:51 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:32:51 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:32:52 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:32:52 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:32:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:53 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:32:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:32:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:32:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:32:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:32:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:32:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:32:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:32:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:32:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:53 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:32:53 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:32:54 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:32:54 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:32:55 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:32:55 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:32:55 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:32:56 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:32:56 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:32:57 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:32:57 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:32:58 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:32:58 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:32:59 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:32:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:32:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:32:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:32:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:32:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:32:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:32:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:32:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:32:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:32:59 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:32:59 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:32:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:32:59 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:33:00 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:33:00 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:33:02 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:33:02 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:33:03 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:33:03 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:33:03 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 10:33:04 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 10:33:04 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 10:33:05 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 10:33:05 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 10:33:06 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 10:33:06 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 10:33:07 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 10:33:07 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 10:33:08 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 10:33:08 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 10:33:09 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 10:33:09 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 10:33:10 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 10:33:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:33:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:33:10 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:33:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:33:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:33:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:33:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:33:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:33:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:33:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:33:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:33:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:33:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:33:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5478 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:33:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:33:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5478 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:33:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5478 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:33:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5478 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:33:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5478 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:33:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5478 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:33:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5478 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:33:10 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=5478 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:33:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:33:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:33:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:33:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:33:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:33:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:33:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:33:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:33:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:33:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:33:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:33:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:33:15 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:15 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:33:15 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:33:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:33:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:33:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:33:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:33:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:33:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:33:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:33:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:33:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:33:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:33:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:33:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:33:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:33:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:33:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:33:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:33:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:33:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:33:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:33:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:33:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:33:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:33:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:33:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:33:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:33:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:33:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:33:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:33:17 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-24 10:33:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:33:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:33:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:33:18 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:33:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:33:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:33:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:33:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:33:18 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:33:19 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:33:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:33:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:33:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:33:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:33:19 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:33:20 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:33:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:33:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:33:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:33:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:33:20 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:33:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:33:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:33:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:33:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:33:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:33:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:33:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:33:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:33:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:33:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:33:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:33:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:33:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:33:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:33:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:33:20 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:33:21 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:33:21 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:33:21 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:33:22 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:33:22 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:33:23 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:33:23 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:33:24 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:33:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:33:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:33:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:33:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:33:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:33:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:33:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:33:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:33:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:33:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:33:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:33:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:33:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:33:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:33:24 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.90.22:6700) Recv SETFH cmd
2024-10-24 10:33:24 [INFO] transceiver.py:201 (MS@172.18.90.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-24 10:33:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:33:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:33:24 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:33:25 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:33:25 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:33:26 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:33:26 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:33:27 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:33:27 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:33:28 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:33:28 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:33:29 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:33:29 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:33:29 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:33:30 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:33:30 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:33:31 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-24 10:33:31 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-24 10:33:32 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-24 10:33:32 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-24 10:33:33 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-24 10:33:33 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-24 10:33:34 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-24 10:33:34 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-24 10:33:35 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-24 10:33:35 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-24 10:33:36 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-24 10:33:36 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-24 10:33:36 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-24 10:33:37 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-24 10:33:37 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-24 10:33:38 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-24 10:33:38 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-24 10:33:39 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-24 10:33:39 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-24 10:33:40 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-24 10:33:40 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-24 10:33:41 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-24 10:33:41 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-24 10:33:42 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-24 10:33:42 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-24 10:33:43 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-24 10:33:43 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-24 10:33:44 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-24 10:33:44 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-24 10:33:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:33:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:33:44 [INFO] transceiver.py:205 (MS@172.18.90.22:6700) Frequency hopping disabled
2024-10-24 10:33:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:33:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:33:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:33:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:33:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:33:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:33:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:33:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:33:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:33:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:33:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:33:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:33:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:33:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:33:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:33:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:33:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:33:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:33:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:33:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:33:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:33:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:33:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:33:50 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:33:50 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:33:50 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:33:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:33:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:33:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:33:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:33:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:33:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:33:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:33:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:33:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:33:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:33:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:33:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:33:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:33:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=402 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:33:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:33:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=402 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:33:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=402 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:33:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=402 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:33:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=402 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:33:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=402 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:33:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=402 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:33:51 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=402 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:33:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:33:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:33:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:33:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:33:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:33:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:33:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:33:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:33:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:33:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:33:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:33:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:33:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:33:57 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:33:57 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:57 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:33:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:33:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:33:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:33:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:33:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:33:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:33:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:33:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:33:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:33:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:33:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:33:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:33:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:34:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:34:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:34:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:34:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:34:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:34:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:34:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:34:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:34:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:34:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:34:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:34:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:34:04 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:34:04 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:04 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:34:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:34:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:34:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:34:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:34:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:34:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:34:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:34:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:34:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:34:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:34:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:34:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:34:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:34:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:34:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:34:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:34:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:34:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:34:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:34:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:34:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:34:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:34:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:34:11 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:34:11 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:11 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:34:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:34:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:34:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:34:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:34:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:34:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:34:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:34:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:34:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:34:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:34:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:34:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:34:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:34:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:34:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:34:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:34:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:34:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:34:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:34:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:34:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:34:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:34:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:34:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:34:18 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:18 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:34:18 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:34:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:34:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:34:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:34:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:18 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:34:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:34:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:34:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:34:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:34:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:34:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:34:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:34:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:34:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:34:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:34:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:34:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:34:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:34:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:34:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:34:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:34:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:34:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:34:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:34:24 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:34:24 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:24 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:26 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:34:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:34:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:34:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:34:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:34:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:34:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:34:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=419 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:34:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=419 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:34:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=419 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:34:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=419 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:34:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=419 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:34:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=419 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:34:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=419 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:34:26 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=419 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:34:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:34:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:34:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:34:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:34:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:34:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:34:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:34:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:34:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:34:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:34:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:34:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:34:31 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:34:31 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:31 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:34:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:34:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:34:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:34:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:34:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:34:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:34:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:34:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:34:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:34:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:34:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:34:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:34:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:34:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:34:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:34:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:34:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:34:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:34:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:34:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:34:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:34:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:34:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:34:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:34:38 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:34:38 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:34:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:34:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:34:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=143 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:34:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=143 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:34:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=143 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:34:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=143 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:34:38 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=143 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:34:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:34:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:34:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:34:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:34:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:34:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:34:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:34:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:34:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:34:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:34:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:34:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:34:44 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:34:44 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:34:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:34:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:34:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:34:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:34:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:34:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:34:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:34:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:34:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:34:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:34:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:34:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:34:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:34:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:34:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:34:50 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:34:50 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:34:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:34:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:34:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=148 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=148 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:34:50 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=148 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:34:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:34:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:34:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:34:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:34:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:34:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:34:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:34:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:34:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:34:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:34:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:34:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:34:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:34:55 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:34:55 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:34:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:55 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:34:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:34:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:34:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:35:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:35:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:35:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:35:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:35:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:35:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:35:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:35:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:35:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:35:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:35:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:35:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:35:01 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:35:01 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:35:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:35:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:35:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:35:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:35:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:35:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:35:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:35:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:35:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:35:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:35:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:35:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:35:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:35:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:35:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:35:07 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:35:07 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:35:07 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:35:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:35:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:35:07 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=157 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:35:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:35:07 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=157 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:07 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=157 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:07 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=158 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:07 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=158 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:07 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=158 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:07 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=158 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:07 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=158 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:07 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=158 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:07 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=158 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:07 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=158 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:35:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:35:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:35:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:35:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:35:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:35:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:35:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:35:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:35:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:35:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:35:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:35:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:35:13 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:35:13 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:35:13 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:35:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:35:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:35:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:35:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:35:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:35:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:35:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:35:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:35:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:35:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:35:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:35:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:35:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:35:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:35:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:35:18 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:35:18 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:18 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:35:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:35:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:35:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:35:19 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:35:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:35:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:35:20 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:35:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:35:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:35:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:35:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:35:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:35:21 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:35:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:35:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:35:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:35:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:35:21 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:35:22 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:35:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:35:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:35:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:35:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:35:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:35:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:35:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:35:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:35:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:35:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:35:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:35:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:35:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:35:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:35:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:35:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:35:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:35:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:35:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:35:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:35:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:35:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:35:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:35:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:35:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:35:27 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:35:27 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:27 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:35:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:35:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:35:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:35:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:35:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:35:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:35:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:35:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:35:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:35:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:35:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:35:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:35:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:35:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:35:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:35:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:35:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:35:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:35:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:35:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:35:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:35:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:35:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:35:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:35:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:35:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:35:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:35:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:35:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:35:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=237 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:35:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=237 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=237 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=237 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=237 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=237 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=237 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:28 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=237 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:35:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:35:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:35:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:35:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:35:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:35:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:35:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:35:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:35:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:35:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:35:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:35:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:35:34 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:35:34 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:35:34 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:35:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:35:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:35:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:35:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:35:34 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:35:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:35:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:35:35 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:35:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:35:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:35:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:35:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:35:35 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:35:36 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-24 10:35:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:35:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:35:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:35:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:35:36 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-24 10:35:37 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-24 10:35:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:35:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:35:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:35:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:35:37 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-24 10:35:38 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-24 10:35:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:35:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:35:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:35:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:35:38 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-24 10:35:39 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-24 10:35:39 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-24 10:35:40 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-24 10:35:40 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-24 10:35:41 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-24 10:35:41 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-24 10:35:42 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-24 10:35:42 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-24 10:35:42 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-24 10:35:43 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-24 10:35:43 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-24 10:35:44 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-24 10:35:44 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-24 10:35:45 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-24 10:35:45 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-24 10:35:46 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-24 10:35:46 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-24 10:35:47 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-24 10:35:47 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-24 10:35:48 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-24 10:35:48 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-24 10:35:49 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-24 10:35:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:35:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:35:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:35:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:35:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:35:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:35:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:35:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:35:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:35:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:35:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:35:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:35:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:35:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:35:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:35:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:35:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:35:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:35:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:35:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:35:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:35:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3440 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3440 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3440 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3440 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3440 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3440 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3440 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:49 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=3440 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:35:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:35:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:35:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:35:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:35:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:35:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:35:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:35:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:35:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:35:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:35:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:35:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:35:54 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:35:54 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:54 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:35:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:35:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:35:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:35:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 10:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:35:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:35:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:35:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:35:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:35:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:35:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:35:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:35:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:35:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:35:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:35:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:35:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:35:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:35:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:35:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:35:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:35:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:35:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:35:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:35:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:35:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=196 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=196 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:35:55 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=196 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:36:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:36:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:36:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:36:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:36:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:36:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:36:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:36:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:36:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:36:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:36:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-24 10:36:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-24 10:36:00 [DEBUG] fake_trx.py:272 (BTS@172.18.90.20:5700) Recv FAKE_TOA cmd
2024-10-24 10:36:00 [DEBUG] fake_trx.py:291 (BTS@172.18.90.20:5700) Recv FAKE_RSSI cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:36:00 [DEBUG] fake_trx.py:316 (BTS@172.18.90.20:5700) Recv FAKE_CI cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:36:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:36:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD HANDOVER
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:36:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:36:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-24 10:36:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:36:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:36:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:36:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:36:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-24 10:36:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-24 10:36:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:36:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:36:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:36:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:36:02 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-24 10:36:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:36:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:36:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:36:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD ECHO
2024-10-24 10:36:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.90.22:6700) Ignore CMD SETSLOT
2024-10-24 10:36:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.90.22:6700) Recv RXTUNE cmd
2024-10-24 10:36:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.90.22:6700) Recv TXTUNE cmd
2024-10-24 10:36:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.90.22:6700) Recv POWERON CMD
2024-10-24 10:36:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.90.22:6700) Starting transceiver...
2024-10-24 10:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD NOHANDOVER
2024-10-24 10:36:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.90.22:6700) Recv POWEROFF cmd
2024-10-24 10:36:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.90.22:6700) Stopping transceiver...
2024-10-24 10:36:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.90.20:5700) Recv SETPOWER cmd
2024-10-24 10:36:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.90.20:5700/1) Recv SETPOWER cmd
2024-10-24 10:36:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.90.20:5700/2) Recv SETPOWER cmd
2024-10-24 10:36:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.90.20:5700/3) Recv SETPOWER cmd
2024-10-24 10:36:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:36:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:36:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:36:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:36:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:36:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:36:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=575 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:36:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:36:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=575 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:36:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=575 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:36:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=575 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:36:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=575 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:36:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=575 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:36:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=575 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:36:03 [WARNING] transceiver.py:250 (BTS@172.18.90.20:5700) RX TRXD message (ver=1 fn=575 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-24 10:36:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:36:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:36:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:36:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:36:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:36:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:36:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:36:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:36:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:36:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:36:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:36:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:36:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:36:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:36:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:36:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:36:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:36:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:36:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:36:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:36:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:36:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:36:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:36:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:36:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:36:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:36:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:36:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:36:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:36:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:36:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:36:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:36:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:36:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.90.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.90.20:5700) Recv SETFORMAT cmd
2024-10-24 10:36:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.90.20:5700) TRXD header version 1 -> 1
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.90.20:5700/1) Recv RXTUNE cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.90.20:5700/1) Recv TXTUNE cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:36:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.90.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.90.20:5700/1) Recv NOMTXPOWER cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.90.20:5700/1) Recv SETFORMAT cmd
2024-10-24 10:36:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.90.20:5700/1) TRXD header version 1 -> 1
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.90.20:5700/2) Recv RXTUNE cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.90.20:5700/2) Recv TXTUNE cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:36:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.90.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.90.20:5700/2) Recv NOMTXPOWER cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.90.20:5700/2) Recv SETFORMAT cmd
2024-10-24 10:36:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.90.20:5700/2) TRXD header version 1 -> 1
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.90.20:5700/3) Recv RXTUNE cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.90.20:5700/3) Recv TXTUNE cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:36:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.90.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.90.20:5700/3) Recv NOMTXPOWER cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.90.20:5700/3) Recv SETFORMAT cmd
2024-10-24 10:36:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.90.20:5700/3) TRXD header version 1 -> 1
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.90.20:5700) Recv RXTUNE cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETTSC
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETTSC
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.90.20:5700) Recv TXTUNE cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETTSC
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETRXGAIN
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETTSC
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETRXGAIN
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETRXGAIN
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.90.20:5700) Recv NOMTXPOWER cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.90.20:5700) Recv POWERON CMD
2024-10-24 10:36:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.90.20:5700) Starting transceiver...
2024-10-24 10:36:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETRXGAIN
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.90.20:5700/1) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.90.20:5700/1) Recv RFMUTE cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.90.20:5700/2) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.90.20:5700) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.90.20:5700/2) Recv RFMUTE cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.90.20:5700) Recv RFMUTE cmd
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.90.20:5700/3) Ignore CMD SETSLOT
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.90.20:5700) Recv POWEROFF cmd
2024-10-24 10:36:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.90.20:5700) Stopping transceiver...
2024-10-24 10:36:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-24 10:36:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.90.20:5700/3) Recv RFMUTE cmd