#2196 (Oct 7, 2024, 8:11:00 AM)

Started by timer

This run spent:

• 3 ms waiting;
• 36 min build duration;
• 36 min total from scheduled to completion.

• origin/master

• MSC_Tests.TC_mt_ussd_for_unknown_subscr
• MSC_Tests.TC_proc_ss_for_unknown_session
• MSC_Tests_Iu.TC_iu_mt_ussd_for_unknown_subscr
• MSC_Tests_Iu.TC_iu_proc_ss_for_unknown_session
• MSC_Tests_Iu.TC_iu_lu_with_invalid_mcc_mnc
• MSC_Tests.TC_lu_imsi_timeout_tmsi_realloc
• MSC_Tests_Iu.TC_iu_lu_imsi_timeout_tmsi_realloc
• MSC_Tests_Iu.TC_iu_cmserv_imsi_unknown
• MSC_Tests_Iu.TC_iu_lu_and_mt_sms_paging_repeated

1. fpga-build: Update RISC-V toolchain to riscv-none-elf (details)